Search

Hoai V. Pham

Examiner (ID: 6989, Phone: (571)272-1715 , Office: P/2892 )

Most Active Art Unit
2892
Art Unit(s)
2811, 2892, 2814
Total Applications
2284
Issued Applications
2067
Pending Applications
82
Abandoned Applications
161

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17210716 [patent_doc_number] => 11171093 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-09 [patent_title] => Semiconductor structure and fabrication method thereof [patent_app_type] => utility [patent_app_number] => 16/703112 [patent_app_country] => US [patent_app_date] => 2019-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 4697 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16703112 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/703112
Semiconductor structure and fabrication method thereof Dec 3, 2019 Issued
Array ( [id] => 17623201 [patent_doc_number] => 11342265 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-24 [patent_title] => Apparatus including a dielectric material in a central portion of a contact via, and related methods, memory devices and electronic systems [patent_app_type] => utility [patent_app_number] => 16/702222 [patent_app_country] => US [patent_app_date] => 2019-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 11160 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16702222 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/702222
Apparatus including a dielectric material in a central portion of a contact via, and related methods, memory devices and electronic systems Dec 2, 2019 Issued
Array ( [id] => 16692103 [patent_doc_number] => 20210074582 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-11 [patent_title] => PROCESS FOR MAKING INTERCONNECT OF GROUP III-V SEMICONDUCTOR DEVICE, AND GROUP III-V SEMICONDUCTOR DEVICE INCLUDING INTERCONNECT MADE THEREBY [patent_app_type] => utility [patent_app_number] => 16/702282 [patent_app_country] => US [patent_app_date] => 2019-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2877 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 310 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16702282 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/702282
Process for making interconnect of group III-V semiconductor device, and group III-V semiconductor device including interconnect made thereby Dec 2, 2019 Issued
Array ( [id] => 16372543 [patent_doc_number] => 10804309 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-13 [patent_title] => Photodetector [patent_app_type] => utility [patent_app_number] => 16/694195 [patent_app_country] => US [patent_app_date] => 2019-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 56 [patent_figures_cnt] => 67 [patent_no_of_words] => 28497 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16694195 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/694195
Photodetector Nov 24, 2019 Issued
Array ( [id] => 16858326 [patent_doc_number] => 20210159071 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-27 [patent_title] => METHOD OF FORMING MULTIPLE PATTERNED LAYERS ON WAFER AND EXPOSURE APPARATUS THEREOF [patent_app_type] => utility [patent_app_number] => 16/694974 [patent_app_country] => US [patent_app_date] => 2019-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7906 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16694974 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/694974
Method of forming multiple patterned layers on wafer and exposure apparatus thereof Nov 24, 2019 Issued
Array ( [id] => 16372549 [patent_doc_number] => 10804315 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-13 [patent_title] => Absorption enhancement structure for image sensor [patent_app_type] => utility [patent_app_number] => 16/693627 [patent_app_country] => US [patent_app_date] => 2019-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 32 [patent_no_of_words] => 9412 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16693627 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/693627
Absorption enhancement structure for image sensor Nov 24, 2019 Issued
Array ( [id] => 15939011 [patent_doc_number] => 20200161139 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => INTEGRATING ATOMIC SCALE PROCESSES: ALD (ATOMIC LAYER DEPOSITION) AND ALE (ATOMIC LAYER ETCH) [patent_app_type] => utility [patent_app_number] => 16/691546 [patent_app_country] => US [patent_app_date] => 2019-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10004 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16691546 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/691546
INTEGRATING ATOMIC SCALE PROCESSES: ALD (ATOMIC LAYER DEPOSITION) AND ALE (ATOMIC LAYER ETCH) Nov 20, 2019 Abandoned
Array ( [id] => 16479302 [patent_doc_number] => 10854255 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-12-01 [patent_title] => Vertical selector stt-MRAM architecture [patent_app_type] => utility [patent_app_number] => 16/691448 [patent_app_country] => US [patent_app_date] => 2019-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4812 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16691448 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/691448
Vertical selector stt-MRAM architecture Nov 20, 2019 Issued
Array ( [id] => 16356490 [patent_doc_number] => 10797008 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-06 [patent_title] => Semiconductor package and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/691518 [patent_app_country] => US [patent_app_date] => 2019-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 6764 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16691518 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/691518
Semiconductor package and manufacturing method thereof Nov 20, 2019 Issued
Array ( [id] => 17969673 [patent_doc_number] => 11487202 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-01 [patent_title] => Photosensitive resin composition, polymer precursor, cured film, laminate, method for producing cured film, and semiconductor device [patent_app_type] => utility [patent_app_number] => 16/689389 [patent_app_country] => US [patent_app_date] => 2019-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 26704 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16689389 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/689389
Photosensitive resin composition, polymer precursor, cured film, laminate, method for producing cured film, and semiconductor device Nov 19, 2019 Issued
Array ( [id] => 17969673 [patent_doc_number] => 11487202 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-01 [patent_title] => Photosensitive resin composition, polymer precursor, cured film, laminate, method for producing cured film, and semiconductor device [patent_app_type] => utility [patent_app_number] => 16/689389 [patent_app_country] => US [patent_app_date] => 2019-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 26704 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16689389 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/689389
Photosensitive resin composition, polymer precursor, cured film, laminate, method for producing cured film, and semiconductor device Nov 19, 2019 Issued
Array ( [id] => 17969673 [patent_doc_number] => 11487202 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-01 [patent_title] => Photosensitive resin composition, polymer precursor, cured film, laminate, method for producing cured film, and semiconductor device [patent_app_type] => utility [patent_app_number] => 16/689389 [patent_app_country] => US [patent_app_date] => 2019-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 26704 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16689389 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/689389
Photosensitive resin composition, polymer precursor, cured film, laminate, method for producing cured film, and semiconductor device Nov 19, 2019 Issued
Array ( [id] => 17969673 [patent_doc_number] => 11487202 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-01 [patent_title] => Photosensitive resin composition, polymer precursor, cured film, laminate, method for producing cured film, and semiconductor device [patent_app_type] => utility [patent_app_number] => 16/689389 [patent_app_country] => US [patent_app_date] => 2019-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 26704 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16689389 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/689389
Photosensitive resin composition, polymer precursor, cured film, laminate, method for producing cured film, and semiconductor device Nov 19, 2019 Issued
Array ( [id] => 16850750 [patent_doc_number] => 20210151495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-05-20 [patent_title] => METAL REFLECTOR GROUNDING FOR NOISE REDUCTION IN LIGHT DETECTOR [patent_app_type] => utility [patent_app_number] => 16/684871 [patent_app_country] => US [patent_app_date] => 2019-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5373 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16684871 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/684871
Metal reflector grounding for noise reduction in light detector Nov 14, 2019 Issued
Array ( [id] => 17092892 [patent_doc_number] => 11121090 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-14 [patent_title] => Fan-out semiconductor package [patent_app_type] => utility [patent_app_number] => 16/683960 [patent_app_country] => US [patent_app_date] => 2019-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 10512 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16683960 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/683960
Fan-out semiconductor package Nov 13, 2019 Issued
Array ( [id] => 16601527 [patent_doc_number] => 20210028058 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-01-28 [patent_title] => VERTICAL SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/683132 [patent_app_country] => US [patent_app_date] => 2019-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6125 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16683132 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/683132
Vertical semiconductor device and method for fabricating the same Nov 12, 2019 Issued
Array ( [id] => 17224649 [patent_doc_number] => 11177159 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-16 [patent_title] => Memory arrays and methods used in forming a memory array comprising strings of memory cells [patent_app_type] => utility [patent_app_number] => 16/682349 [patent_app_country] => US [patent_app_date] => 2019-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 31 [patent_no_of_words] => 6418 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16682349 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/682349
Memory arrays and methods used in forming a memory array comprising strings of memory cells Nov 12, 2019 Issued
Array ( [id] => 17284010 [patent_doc_number] => 11201051 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-14 [patent_title] => Method for layer by layer growth of conformal films [patent_app_type] => utility [patent_app_number] => 16/679594 [patent_app_country] => US [patent_app_date] => 2019-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 5250 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16679594 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/679594
Method for layer by layer growth of conformal films Nov 10, 2019 Issued
Array ( [id] => 17786077 [patent_doc_number] => 11409196 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-09 [patent_title] => Method for forming patterns [patent_app_type] => utility [patent_app_number] => 16/677425 [patent_app_country] => US [patent_app_date] => 2019-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 3749 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16677425 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/677425
Method for forming patterns Nov 6, 2019 Issued
Array ( [id] => 16249664 [patent_doc_number] => 10749040 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-18 [patent_title] => Integration scheme for non-volatile memory on gate-all-around structure [patent_app_type] => utility [patent_app_number] => 16/675391 [patent_app_country] => US [patent_app_date] => 2019-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 43 [patent_no_of_words] => 6187 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16675391 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/675391
Integration scheme for non-volatile memory on gate-all-around structure Nov 5, 2019 Issued
Menu