Search

Hoai V. Pham

Examiner (ID: 18096)

Most Active Art Unit
2892
Art Unit(s)
2814, 2892, 2811
Total Applications
2250
Issued Applications
2043
Pending Applications
85
Abandoned Applications
160

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14414423 [patent_doc_number] => 20190173055 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-06 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/255233 [patent_app_country] => US [patent_app_date] => 2019-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5130 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16255233 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/255233
Display device having a density of the first inorganic layer in the first region is higher than in the second region Jan 22, 2019 Issued
Array ( [id] => 16448533 [patent_doc_number] => 10840464 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-17 [patent_title] => Foldable electronic device having an elastic body in openings of the spacers [patent_app_type] => utility [patent_app_number] => 16/248890 [patent_app_country] => US [patent_app_date] => 2019-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 61 [patent_no_of_words] => 22080 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16248890 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/248890
Foldable electronic device having an elastic body in openings of the spacers Jan 15, 2019 Issued
Array ( [id] => 16201874 [patent_doc_number] => 10727052 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-28 [patent_title] => Semiconductor chip having a mask layer with openings [patent_app_type] => utility [patent_app_number] => 16/240142 [patent_app_country] => US [patent_app_date] => 2019-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 23 [patent_no_of_words] => 5266 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16240142 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/240142
Semiconductor chip having a mask layer with openings Jan 3, 2019 Issued
Array ( [id] => 18317614 [patent_doc_number] => 11631700 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-18 [patent_title] => Flexible display apparatus with porous substrate [patent_app_type] => utility [patent_app_number] => 16/228213 [patent_app_country] => US [patent_app_date] => 2018-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 7115 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16228213 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/228213
Flexible display apparatus with porous substrate Dec 19, 2018 Issued
Array ( [id] => 14238819 [patent_doc_number] => 20190131582 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-02 [patent_title] => LIGHT-EMITTING DEVICE [patent_app_type] => utility [patent_app_number] => 16/221352 [patent_app_country] => US [patent_app_date] => 2018-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5675 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16221352 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/221352
Light-emitting device having an intermediate layer located over a lateral side of the first electrode Dec 13, 2018 Issued
Array ( [id] => 14492481 [patent_doc_number] => 10333043 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-25 [patent_title] => Light emitting device having element connection sections with convex shapes [patent_app_type] => utility [patent_app_number] => 16/217365 [patent_app_country] => US [patent_app_date] => 2018-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 32 [patent_no_of_words] => 12507 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16217365 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/217365
Light emitting device having element connection sections with convex shapes Dec 11, 2018 Issued
Array ( [id] => 16148303 [patent_doc_number] => 10707232 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-07 [patent_title] => Method for fabricating semiconductor device using a porosity in a sacrificial pattern, and fabricating equipment for semiconductor device using the same [patent_app_type] => utility [patent_app_number] => 16/216451 [patent_app_country] => US [patent_app_date] => 2018-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 27 [patent_no_of_words] => 9311 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16216451 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/216451
Method for fabricating semiconductor device using a porosity in a sacrificial pattern, and fabricating equipment for semiconductor device using the same Dec 10, 2018 Issued
Array ( [id] => 15733215 [patent_doc_number] => 10615041 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-07 [patent_title] => Methods and materials for modifying the threshold voltage of metal oxide stacks [patent_app_type] => utility [patent_app_number] => 16/216500 [patent_app_country] => US [patent_app_date] => 2018-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3208 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16216500 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/216500
Methods and materials for modifying the threshold voltage of metal oxide stacks Dec 10, 2018 Issued
Array ( [id] => 15733247 [patent_doc_number] => 10615057 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-04-07 [patent_title] => Encapsulation process for semiconductor devices [patent_app_type] => utility [patent_app_number] => 16/216619 [patent_app_country] => US [patent_app_date] => 2018-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 22 [patent_no_of_words] => 4487 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16216619 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/216619
Encapsulation process for semiconductor devices Dec 10, 2018 Issued
Array ( [id] => 14475725 [patent_doc_number] => 20190189510 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-20 [patent_title] => Selectively Etched Self-Aligned Via Processes [patent_app_type] => utility [patent_app_number] => 16/216247 [patent_app_country] => US [patent_app_date] => 2018-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12361 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16216247 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/216247
Selectively etched self-aligned via processes Dec 10, 2018 Issued
Array ( [id] => 16048489 [patent_doc_number] => 10686130 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-16 [patent_title] => Phase-change material (PCM) contact configurations for improving performance in PCM RF switches [patent_app_type] => utility [patent_app_number] => 16/216717 [patent_app_country] => US [patent_app_date] => 2018-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9079 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16216717 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/216717
Phase-change material (PCM) contact configurations for improving performance in PCM RF switches Dec 10, 2018 Issued
Array ( [id] => 15984721 [patent_doc_number] => 10672698 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-02 [patent_title] => Chip on film including signal lines for multiple signal paths and a display device having thereof [patent_app_type] => utility [patent_app_number] => 16/215331 [patent_app_country] => US [patent_app_date] => 2018-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 8393 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16215331 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/215331
Chip on film including signal lines for multiple signal paths and a display device having thereof Dec 9, 2018 Issued
Array ( [id] => 16372406 [patent_doc_number] => 10804172 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-13 [patent_title] => Semiconductor package device with thermal conducting material for heat dissipation [patent_app_type] => utility [patent_app_number] => 16/215372 [patent_app_country] => US [patent_app_date] => 2018-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 31 [patent_no_of_words] => 5371 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16215372 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/215372
Semiconductor package device with thermal conducting material for heat dissipation Dec 9, 2018 Issued
Array ( [id] => 15717925 [patent_doc_number] => 20200105730 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => Semiconductor Devices Having a Plurality of First and Second Conductive Strips [patent_app_type] => utility [patent_app_number] => 16/215373 [patent_app_country] => US [patent_app_date] => 2018-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8660 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16215373 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/215373
Semiconductor devices having a plurality of first and second conductive strips Dec 9, 2018 Issued
Array ( [id] => 15791447 [patent_doc_number] => 10629455 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-04-21 [patent_title] => Semiconductor package having a blocking dam [patent_app_type] => utility [patent_app_number] => 16/215130 [patent_app_country] => US [patent_app_date] => 2018-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4982 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16215130 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/215130
Semiconductor package having a blocking dam Dec 9, 2018 Issued
Array ( [id] => 14050007 [patent_doc_number] => 20190081111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-14 [patent_title] => ORGANIC LIGHT EMITTING DIODE DISPLAY AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/186817 [patent_app_country] => US [patent_app_date] => 2018-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6198 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16186817 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/186817
Method of manufacturing an organic light emitting diode display having an auxiliary member in contact with an upper surface of an auxiliary electrode Nov 11, 2018 Issued
Array ( [id] => 15673287 [patent_doc_number] => 10600887 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-24 [patent_title] => Approach to high-k dielectric feature uniformity [patent_app_type] => utility [patent_app_number] => 16/180723 [patent_app_country] => US [patent_app_date] => 2018-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 7352 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16180723 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/180723
Approach to high-k dielectric feature uniformity Nov 4, 2018 Issued
Array ( [id] => 14191463 [patent_doc_number] => 20190115437 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-18 [patent_title] => NEGATIVE CAPACITANCE MATCHING IN GATE ELECTRODE STRUCTURES [patent_app_type] => utility [patent_app_number] => 16/167081 [patent_app_country] => US [patent_app_date] => 2018-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11034 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16167081 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/167081
Negative capacitance matching in gate electrode structures Oct 21, 2018 Issued
Array ( [id] => 13936135 [patent_doc_number] => 20190051583 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-14 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/161824 [patent_app_country] => US [patent_app_date] => 2018-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 31429 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16161824 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/161824
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME Oct 15, 2018 Abandoned
Array ( [id] => 15598331 [patent_doc_number] => 20200075700 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => OLED DISPLAY PANEL AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/308612 [patent_app_country] => US [patent_app_date] => 2018-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5824 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16308612 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/308612
OLED display panel having a first barrier closed ring and a second barrier closed ring Oct 11, 2018 Issued
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