Search

Hoai V. Pham

Examiner (ID: 18096)

Most Active Art Unit
2892
Art Unit(s)
2814, 2892, 2811
Total Applications
2250
Issued Applications
2043
Pending Applications
85
Abandoned Applications
160

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10053540 [patent_doc_number] => 09093425 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-07-28 [patent_title] => 'Self-aligned liner formed on metal semiconductor alloy contacts' [patent_app_type] => utility [patent_app_number] => 14/177481 [patent_app_country] => US [patent_app_date] => 2014-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 12021 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14177481 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/177481
Self-aligned liner formed on metal semiconductor alloy contacts Feb 10, 2014 Issued
Array ( [id] => 10132159 [patent_doc_number] => 09166001 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-20 [patent_title] => 'Vertical structure and method of forming semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/177653 [patent_app_country] => US [patent_app_date] => 2014-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 3639 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14177653 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/177653
Vertical structure and method of forming semiconductor device Feb 10, 2014 Issued
Array ( [id] => 10617817 [patent_doc_number] => 09337269 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-10 [patent_title] => 'Buried-channel FinFET device and method' [patent_app_type] => utility [patent_app_number] => 14/178053 [patent_app_country] => US [patent_app_date] => 2014-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4422 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14178053 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/178053
Buried-channel FinFET device and method Feb 10, 2014 Issued
Array ( [id] => 10343766 [patent_doc_number] => 20150228771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-13 [patent_title] => 'ELECTROSTATIC DISCHARGE PROTECTION STRUCTURE CAPABLE OF PREVENTING LATCH-UP ISSUE CAUSED BY UNEXPECTED NOISE' [patent_app_type] => utility [patent_app_number] => 14/177228 [patent_app_country] => US [patent_app_date] => 2014-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4584 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14177228 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/177228
Electrostatic discharge protection structure capable of preventing latch-up issue caused by unexpected noise Feb 10, 2014 Issued
Array ( [id] => 10099792 [patent_doc_number] => 09136109 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-15 [patent_title] => 'Sacrificial oxide with uniform thickness' [patent_app_type] => utility [patent_app_number] => 14/177939 [patent_app_country] => US [patent_app_date] => 2014-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 22 [patent_no_of_words] => 5974 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14177939 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/177939
Sacrificial oxide with uniform thickness Feb 10, 2014 Issued
Array ( [id] => 10343762 [patent_doc_number] => 20150228766 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-13 [patent_title] => 'Formation of High Quality Fin in 3D Structure by Way of Two-Step Implantation' [patent_app_type] => utility [patent_app_number] => 14/177518 [patent_app_country] => US [patent_app_date] => 2014-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5913 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14177518 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/177518
Formation of high quality fin in 3D structure by way of two-step implantation Feb 10, 2014 Issued
Array ( [id] => 10502462 [patent_doc_number] => 09230863 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-05 [patent_title] => 'Method for producing integrated circuit with smaller grains of tungsten' [patent_app_type] => utility [patent_app_number] => 14/177854 [patent_app_country] => US [patent_app_date] => 2014-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 4230 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14177854 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/177854
Method for producing integrated circuit with smaller grains of tungsten Feb 10, 2014 Issued
Array ( [id] => 13666941 [patent_doc_number] => 10163644 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-25 [patent_title] => Interconnect structure including a conductive feature and a barrier layer on sidewalls and a bottom surface of the conductive feature and method of forming the same [patent_app_type] => utility [patent_app_number] => 14/175685 [patent_app_country] => US [patent_app_date] => 2014-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4402 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14175685 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/175685
Interconnect structure including a conductive feature and a barrier layer on sidewalls and a bottom surface of the conductive feature and method of forming the same Feb 6, 2014 Issued
Array ( [id] => 10340225 [patent_doc_number] => 20150225230 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-13 [patent_title] => 'SUPPORT FOR MEMS COVER' [patent_app_type] => utility [patent_app_number] => 14/175970 [patent_app_country] => US [patent_app_date] => 2014-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4238 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14175970 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/175970
SUPPORT FOR MEMS COVER Feb 6, 2014 Abandoned
Array ( [id] => 10079892 [patent_doc_number] => 09117745 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-25 [patent_title] => 'Mechanisms for forming stressor regions in a semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/173370 [patent_app_country] => US [patent_app_date] => 2014-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5391 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14173370 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/173370
Mechanisms for forming stressor regions in a semiconductor device Feb 4, 2014 Issued
Array ( [id] => 10329343 [patent_doc_number] => 20150214347 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-30 [patent_title] => 'Semiconductor Device Including Undulated Profile of Net Doping in a Drift Zone' [patent_app_type] => utility [patent_app_number] => 14/165658 [patent_app_country] => US [patent_app_date] => 2014-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4821 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14165658 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/165658
Semiconductor device including undulated profile of net doping in a drift zone Jan 27, 2014 Issued
Array ( [id] => 9937989 [patent_doc_number] => 08987801 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-24 [patent_title] => 'Memory cells having a plurality of control gates and memory cells having a control gate and a shield' [patent_app_type] => utility [patent_app_number] => 14/165220 [patent_app_country] => US [patent_app_date] => 2014-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 10422 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14165220 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/165220
Memory cells having a plurality of control gates and memory cells having a control gate and a shield Jan 26, 2014 Issued
Array ( [id] => 10893337 [patent_doc_number] => 08916952 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-12-23 [patent_title] => 'Self-aligned emitter-base in advanced BiCMOS technology' [patent_app_type] => utility [patent_app_number] => 14/162256 [patent_app_country] => US [patent_app_date] => 2014-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 3701 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14162256 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/162256
Self-aligned emitter-base in advanced BiCMOS technology Jan 22, 2014 Issued
Array ( [id] => 9475441 [patent_doc_number] => 20140132903 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-15 [patent_title] => 'FRINGE FIELD SWITCHING LIQUID CRYSTAL DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/160380 [patent_app_country] => US [patent_app_date] => 2014-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 12871 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14160380 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/160380
Fringe field switching liquid crystal display device and method of fabricating the same Jan 20, 2014 Issued
Array ( [id] => 9463417 [patent_doc_number] => 20140127844 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-08 [patent_title] => 'MANUFACTURING METHOD OF ARRAY SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 14/155380 [patent_app_country] => US [patent_app_date] => 2014-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 35 [patent_no_of_words] => 12424 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14155380 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/155380
Manufacturing method of array substrate Jan 14, 2014 Issued
Array ( [id] => 10035464 [patent_doc_number] => 09076790 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-07-07 [patent_title] => 'Air gap forming techniques based on anodic alumina for interconnect structures' [patent_app_type] => utility [patent_app_number] => 14/151158 [patent_app_country] => US [patent_app_date] => 2014-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 2952 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14151158 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/151158
Air gap forming techniques based on anodic alumina for interconnect structures Jan 8, 2014 Issued
Array ( [id] => 10016106 [patent_doc_number] => 09059127 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-06-16 [patent_title] => 'Packages for three-dimensional die stacks' [patent_app_type] => utility [patent_app_number] => 14/151156 [patent_app_country] => US [patent_app_date] => 2014-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4384 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14151156 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/151156
Packages for three-dimensional die stacks Jan 8, 2014 Issued
Array ( [id] => 10035543 [patent_doc_number] => 09076869 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-07-07 [patent_title] => 'FinFET device and method' [patent_app_type] => utility [patent_app_number] => 14/150588 [patent_app_country] => US [patent_app_date] => 2014-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4604 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14150588 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/150588
FinFET device and method Jan 7, 2014 Issued
Array ( [id] => 10309485 [patent_doc_number] => 20150194486 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-09 [patent_title] => 'SEMICONDUCTOR DEVICE AND FORMATION THEREOF' [patent_app_type] => utility [patent_app_number] => 14/150250 [patent_app_country] => US [patent_app_date] => 2014-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 8552 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14150250 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/150250
Semiconductor device and formation thereof Jan 7, 2014 Issued
Array ( [id] => 10309419 [patent_doc_number] => 20150194420 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-09 [patent_title] => 'Semiconductor Device' [patent_app_type] => utility [patent_app_number] => 14/150638 [patent_app_country] => US [patent_app_date] => 2014-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5432 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14150638 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/150638
Semiconductor device Jan 7, 2014 Issued
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