Search

Hoai V. Pham

Examiner (ID: 18096)

Most Active Art Unit
2892
Art Unit(s)
2814, 2892, 2811
Total Applications
2250
Issued Applications
2043
Pending Applications
85
Abandoned Applications
160

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9020311 [patent_doc_number] => 08530296 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-10 [patent_title] => 'High voltage transistor using diluted drain' [patent_app_type] => utility [patent_app_number] => 13/765054 [patent_app_country] => US [patent_app_date] => 2013-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5927 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 510 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13765054 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/765054
High voltage transistor using diluted drain Feb 11, 2013 Issued
Array ( [id] => 9376411 [patent_doc_number] => 08680676 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-03-25 [patent_title] => 'Semiconductor package with under bump metallization routing' [patent_app_type] => utility [patent_app_number] => 13/758871 [patent_app_country] => US [patent_app_date] => 2013-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 6800 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13758871 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/758871
Semiconductor package with under bump metallization routing Feb 3, 2013 Issued
Array ( [id] => 8937414 [patent_doc_number] => 20130187211 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-25 [patent_title] => 'Multi-Layer Integrated Circuit Package' [patent_app_type] => utility [patent_app_number] => 13/723531 [patent_app_country] => US [patent_app_date] => 2012-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3911 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13723531 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/723531
Multi-layer integrated circuit package Dec 20, 2012 Issued
Array ( [id] => 8788860 [patent_doc_number] => 20130105829 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-02 [patent_title] => 'LED CHIP-BASED LIGHTING PRODUCTS AND METHODS OF BUILDING' [patent_app_type] => utility [patent_app_number] => 13/718755 [patent_app_country] => US [patent_app_date] => 2012-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 10720 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13718755 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/718755
LED chip-based lighting products and methods of building Dec 17, 2012 Issued
Array ( [id] => 8888633 [patent_doc_number] => 20130161817 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-27 [patent_title] => 'TECHNIQUES FOR WAFER-LEVEL PROCESSING OF QFN PACKAGES' [patent_app_type] => utility [patent_app_number] => 13/690634 [patent_app_country] => US [patent_app_date] => 2012-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2865 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13690634 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/690634
Techniques for wafer-level processing of QFN packages Nov 29, 2012 Issued
Array ( [id] => 9937245 [patent_doc_number] => 08987050 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-03-24 [patent_title] => 'Method and system for backside dielectric patterning for wafer warpage and stress control' [patent_app_type] => utility [patent_app_number] => 13/690817 [patent_app_country] => US [patent_app_date] => 2012-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4745 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13690817 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/690817
Method and system for backside dielectric patterning for wafer warpage and stress control Nov 29, 2012 Issued
Array ( [id] => 9515205 [patent_doc_number] => 20140151697 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-05 [patent_title] => 'Semiconductor Packages, Systems, and Methods of Formation Thereof' [patent_app_type] => utility [patent_app_number] => 13/691293 [patent_app_country] => US [patent_app_date] => 2012-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7803 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13691293 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/691293
Semiconductor packages, systems, and methods of formation thereof Nov 29, 2012 Issued
Array ( [id] => 9000395 [patent_doc_number] => 20130221518 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-29 [patent_title] => 'PRINTED WIRING BOARD' [patent_app_type] => utility [patent_app_number] => 13/690570 [patent_app_country] => US [patent_app_date] => 2012-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 12148 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13690570 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/690570
Printed wiring board Nov 29, 2012 Issued
Array ( [id] => 9079016 [patent_doc_number] => 20130264546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-10 [patent_title] => 'ORGANIC LIGHT EMITTING DIODE DEVICE AND FABRICATION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/690635 [patent_app_country] => US [patent_app_date] => 2012-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3845 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13690635 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/690635
Organic light emitting diode device and fabrication method thereof Nov 29, 2012 Issued
Array ( [id] => 9515320 [patent_doc_number] => 20140151813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-05 [patent_title] => 'COMPUTER CHIP ARCHITECTURE' [patent_app_type] => utility [patent_app_number] => 13/690761 [patent_app_country] => US [patent_app_date] => 2012-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7227 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13690761 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/690761
COMPUTER CHIP ARCHITECTURE Nov 29, 2012 Abandoned
Array ( [id] => 9455841 [patent_doc_number] => 08716854 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-06 [patent_title] => 'Multi-chip package' [patent_app_type] => utility [patent_app_number] => 13/690771 [patent_app_country] => US [patent_app_date] => 2012-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4695 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13690771 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/690771
Multi-chip package Nov 29, 2012 Issued
Array ( [id] => 9515319 [patent_doc_number] => 20140151811 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-05 [patent_title] => 'SRAM Cell Comprising FinFETs' [patent_app_type] => utility [patent_app_number] => 13/691187 [patent_app_country] => US [patent_app_date] => 2012-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3344 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13691187 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/691187
SRAM cell comprising FinFETs Nov 29, 2012 Issued
Array ( [id] => 9515253 [patent_doc_number] => 20140151746 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-05 [patent_title] => 'FINFET DEVICE WITH ISOLATED CHANNEL' [patent_app_type] => utility [patent_app_number] => 13/691070 [patent_app_country] => US [patent_app_date] => 2012-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5954 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13691070 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/691070
FinFET device with isolated channel Nov 29, 2012 Issued
Array ( [id] => 9515355 [patent_doc_number] => 20140151847 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-05 [patent_title] => 'AREA-EFFICIENT CAPACITOR USING CARBON NANOTUBES' [patent_app_type] => utility [patent_app_number] => 13/690593 [patent_app_country] => US [patent_app_date] => 2012-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2998 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13690593 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/690593
Area-efficient capacitor using carbon nanotubes Nov 29, 2012 Issued
Array ( [id] => 9515329 [patent_doc_number] => 20140151821 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-05 [patent_title] => 'MEMS STRUCTURE WITH ADAPTABLE INTER-SUBSTRATE BOND' [patent_app_type] => utility [patent_app_number] => 13/691281 [patent_app_country] => US [patent_app_date] => 2012-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4875 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13691281 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/691281
MEMS structure with adaptable inter-substrate bond Nov 29, 2012 Issued
Array ( [id] => 9515301 [patent_doc_number] => 20140151793 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-05 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/690973 [patent_app_country] => US [patent_app_date] => 2012-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6190 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13690973 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/690973
High voltage semiconductor device Nov 29, 2012 Issued
Array ( [id] => 9552836 [patent_doc_number] => 08759888 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-24 [patent_title] => 'Super trench schottky barrier schottky diode' [patent_app_type] => utility [patent_app_number] => 13/691038 [patent_app_country] => US [patent_app_date] => 2012-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3271 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13691038 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/691038
Super trench schottky barrier schottky diode Nov 29, 2012 Issued
Array ( [id] => 8850897 [patent_doc_number] => 20130140572 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-06 [patent_title] => 'ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/691143 [patent_app_country] => US [patent_app_date] => 2012-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4714 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13691143 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/691143
Array substrate with improved pad region and method for manufacturing the same Nov 29, 2012 Issued
Array ( [id] => 9762900 [patent_doc_number] => 08847228 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-30 [patent_title] => 'Thin film transistor array panel' [patent_app_type] => utility [patent_app_number] => 13/691307 [patent_app_country] => US [patent_app_date] => 2012-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5284 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13691307 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/691307
Thin film transistor array panel Nov 29, 2012 Issued
Array ( [id] => 9355828 [patent_doc_number] => 08674365 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-18 [patent_title] => 'Array substrate and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 13/668332 [patent_app_country] => US [patent_app_date] => 2012-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 12564 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13668332 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/668332
Array substrate and manufacturing method thereof Nov 4, 2012 Issued
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