
Hoai V. Pham
Examiner (ID: 18096)
| Most Active Art Unit | 2892 |
| Art Unit(s) | 2814, 2892, 2811 |
| Total Applications | 2250 |
| Issued Applications | 2043 |
| Pending Applications | 85 |
| Abandoned Applications | 160 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9414186
[patent_doc_number] => 08698223
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-04-15
[patent_title] => 'Semiconductor device and forming method of the same'
[patent_app_type] => utility
[patent_app_number] => 13/324006
[patent_app_country] => US
[patent_app_date] => 2011-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 6674
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13324006
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/324006 | Semiconductor device and forming method of the same | Dec 12, 2011 | Issued |
Array
(
[id] => 8474429
[patent_doc_number] => 20120273836
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-11-01
[patent_title] => 'SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/324306
[patent_app_country] => US
[patent_app_date] => 2011-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 3691
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13324306
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/324306 | Semiconductor device | Dec 12, 2011 | Issued |
Array
(
[id] => 9455089
[patent_doc_number] => 08716096
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-05-06
[patent_title] => 'Self-aligned emitter-base in advanced BiCMOS technology'
[patent_app_type] => utility
[patent_app_number] => 13/323977
[patent_app_country] => US
[patent_app_date] => 2011-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 20
[patent_no_of_words] => 3669
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13323977
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/323977 | Self-aligned emitter-base in advanced BiCMOS technology | Dec 12, 2011 | Issued |
Array
(
[id] => 9127797
[patent_doc_number] => 08575748
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-11-05
[patent_title] => 'Wafer-level packaging with compression-controlled seal ring bonding'
[patent_app_type] => utility
[patent_app_number] => 13/324076
[patent_app_country] => US
[patent_app_date] => 2011-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 6
[patent_no_of_words] => 2260
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13324076
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/324076 | Wafer-level packaging with compression-controlled seal ring bonding | Dec 12, 2011 | Issued |
Array
(
[id] => 9086911
[patent_doc_number] => 08558341
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-10-15
[patent_title] => 'Photoelectric conversion element'
[patent_app_type] => utility
[patent_app_number] => 13/323924
[patent_app_country] => US
[patent_app_date] => 2011-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 23
[patent_no_of_words] => 11213
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13323924
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/323924 | Photoelectric conversion element | Dec 12, 2011 | Issued |
Array
(
[id] => 9255203
[patent_doc_number] => 08618622
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-12-31
[patent_title] => 'Photodetector optimized by metal texturing provided on the rear surface'
[patent_app_type] => utility
[patent_app_number] => 13/324315
[patent_app_country] => US
[patent_app_date] => 2011-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 20
[patent_no_of_words] => 7501
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13324315
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/324315 | Photodetector optimized by metal texturing provided on the rear surface | Dec 12, 2011 | Issued |
Array
(
[id] => 9483685
[patent_doc_number] => 08729638
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-05-20
[patent_title] => 'Method for making FINFETs and semiconductor structures formed therefrom'
[patent_app_type] => utility
[patent_app_number] => 13/696071
[patent_app_country] => US
[patent_app_date] => 2011-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 39
[patent_no_of_words] => 4571
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13696071
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/696071 | Method for making FINFETs and semiconductor structures formed therefrom | Nov 29, 2011 | Issued |
Array
(
[id] => 8190130
[patent_doc_number] => 08183614
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-05-22
[patent_title] => 'Stack capacitor of memory device and fabrication method thereof'
[patent_app_type] => utility
[patent_app_number] => 13/294937
[patent_app_country] => US
[patent_app_date] => 2011-11-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 2311
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/183/08183614.pdf
[firstpage_image] =>[orig_patent_app_number] => 13294937
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/294937 | Stack capacitor of memory device and fabrication method thereof | Nov 10, 2011 | Issued |
Array
(
[id] => 8453322
[patent_doc_number] => 20120264263
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-10-18
[patent_title] => 'Structure and Fabrication of Like-polarity Field-effect Transistors Having Different Configurations of Source/Drain Extensions, Halo Pockets, and Gate Dielectric Thicknesses'
[patent_app_type] => utility
[patent_app_number] => 13/293096
[patent_app_country] => US
[patent_app_date] => 2011-11-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 100
[patent_figures_cnt] => 100
[patent_no_of_words] => 132598
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13293096
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/293096 | Structure and fabrication of like-polarity field-effect transistors having different configurations of source/drain extensions, halo pockets, and gate dielectric thicknesses | Nov 8, 2011 | Issued |
Array
(
[id] => 9158738
[patent_doc_number] => 20130307015
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-11-21
[patent_title] => 'Optoelectronic Semiconductor Device'
[patent_app_type] => utility
[patent_app_number] => 13/885659
[patent_app_country] => US
[patent_app_date] => 2011-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4808
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13885659
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/885659 | Optoelectronic semiconductor device | Nov 7, 2011 | Issued |
Array
(
[id] => 7791090
[patent_doc_number] => 20120052646
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-03-01
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/288296
[patent_app_country] => US
[patent_app_date] => 2011-11-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 10054
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0052/20120052646.pdf
[firstpage_image] =>[orig_patent_app_number] => 13288296
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/288296 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME | Nov 2, 2011 | Abandoned |
Array
(
[id] => 7780956
[patent_doc_number] => 20120042512
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-02-23
[patent_title] => 'LED Chip-Based Lighting Products And Methods Of Building'
[patent_app_type] => utility
[patent_app_number] => 13/287796
[patent_app_country] => US
[patent_app_date] => 2011-11-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 10685
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0042/20120042512.pdf
[firstpage_image] =>[orig_patent_app_number] => 13287796
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/287796 | LED chip-based lighting products and methods of building | Nov 1, 2011 | Issued |
Array
(
[id] => 8701470
[patent_doc_number] => 08394692
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-03-12
[patent_title] => 'Integrating a first contact structure in a gate last process'
[patent_app_type] => utility
[patent_app_number] => 13/286276
[patent_app_country] => US
[patent_app_date] => 2011-11-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 5993
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 187
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13286276
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/286276 | Integrating a first contact structure in a gate last process | Oct 31, 2011 | Issued |
Array
(
[id] => 8780121
[patent_doc_number] => 20130102096
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-04-25
[patent_title] => 'SIMULTANEOUS SILICONE DISPENSION ON COUPLER'
[patent_app_type] => utility
[patent_app_number] => 13/280116
[patent_app_country] => US
[patent_app_date] => 2011-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4002
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13280116
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/280116 | Simultaneous silicone dispension on coupler | Oct 23, 2011 | Issued |
Array
(
[id] => 8780137
[patent_doc_number] => 20130102112
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-04-25
[patent_title] => 'Process for Forming Packages'
[patent_app_type] => utility
[patent_app_number] => 13/280163
[patent_app_country] => US
[patent_app_date] => 2011-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2928
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13280163
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/280163 | Process for forming packages | Oct 23, 2011 | Issued |
Array
(
[id] => 9086222
[patent_doc_number] => 08557649
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-10-15
[patent_title] => 'Method for controlling structure height'
[patent_app_type] => utility
[patent_app_number] => 13/278301
[patent_app_country] => US
[patent_app_date] => 2011-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 17
[patent_no_of_words] => 2869
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13278301
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/278301 | Method for controlling structure height | Oct 20, 2011 | Issued |
Array
(
[id] => 9227405
[patent_doc_number] => 08633073
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-01-21
[patent_title] => 'Method of forming semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 13/278679
[patent_app_country] => US
[patent_app_date] => 2011-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 35
[patent_figures_cnt] => 60
[patent_no_of_words] => 12202
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13278679
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/278679 | Method of forming semiconductor device | Oct 20, 2011 | Issued |
Array
(
[id] => 9140171
[patent_doc_number] => 08580630
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-11-12
[patent_title] => 'Methods for forming a metal gate structure on a substrate'
[patent_app_type] => utility
[patent_app_number] => 13/278335
[patent_app_country] => US
[patent_app_date] => 2011-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 5259
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13278335
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/278335 | Methods for forming a metal gate structure on a substrate | Oct 20, 2011 | Issued |
Array
(
[id] => 9086222
[patent_doc_number] => 08557649
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-10-15
[patent_title] => 'Method for controlling structure height'
[patent_app_type] => utility
[patent_app_number] => 13/278301
[patent_app_country] => US
[patent_app_date] => 2011-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 17
[patent_no_of_words] => 2869
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13278301
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/278301 | Method for controlling structure height | Oct 20, 2011 | Issued |
Array
(
[id] => 9020309
[patent_doc_number] => 08530294
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-09-10
[patent_title] => 'Stress modulation for metal gate semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 13/278725
[patent_app_country] => US
[patent_app_date] => 2011-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 5267
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13278725
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/278725 | Stress modulation for metal gate semiconductor device | Oct 20, 2011 | Issued |