
Hoai V. Pham
Examiner (ID: 18096)
| Most Active Art Unit | 2892 |
| Art Unit(s) | 2814, 2892, 2811 |
| Total Applications | 2250 |
| Issued Applications | 2043 |
| Pending Applications | 85 |
| Abandoned Applications | 160 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8470223
[patent_doc_number] => 08299401
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-10-30
[patent_title] => 'Method and apparatus for forming a vehicle window assembly'
[patent_app_type] => utility
[patent_app_number] => 12/821216
[patent_app_country] => US
[patent_app_date] => 2010-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 1964
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[patent_words_short_claim] => 126
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12821216
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/821216 | Method and apparatus for forming a vehicle window assembly | Jun 22, 2010 | Issued |
Array
(
[id] => 6273783
[patent_doc_number] => 20100255636
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-10-07
[patent_title] => 'PACKAGED SEMICONDUCTOR COMPONENTS HAVING SUBSTANTIALLY RIGID SUPPORT MEMBERS AND METHODS OF PACKAGING SEMICONDUCTOR COMPONENTS'
[patent_app_type] => utility
[patent_app_number] => 12/816480
[patent_app_country] => US
[patent_app_date] => 2010-06-16
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[pdf_file] => publications/A1/0255/20100255636.pdf
[firstpage_image] =>[orig_patent_app_number] => 12816480
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/816480 | PACKAGED SEMICONDUCTOR COMPONENTS HAVING SUBSTANTIALLY RIGID SUPPORT MEMBERS AND METHODS OF PACKAGING SEMICONDUCTOR COMPONENTS | Jun 15, 2010 | Abandoned |
Array
(
[id] => 8006847
[patent_doc_number] => 08084828
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-12-27
[patent_title] => 'Methods for protecting gate stacks during fabrication of semiconductor devices and semiconductor devices fabricated from such methods'
[patent_app_type] => utility
[patent_app_number] => 12/815129
[patent_app_country] => US
[patent_app_date] => 2010-06-14
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/08/084/08084828.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/815129 | Methods for protecting gate stacks during fabrication of semiconductor devices and semiconductor devices fabricated from such methods | Jun 13, 2010 | Issued |
Array
(
[id] => 6320803
[patent_doc_number] => 20100244115
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-09-30
[patent_title] => 'ANTI-FUSE MEMORY CELL'
[patent_app_type] => utility
[patent_app_number] => 12/814124
[patent_app_country] => US
[patent_app_date] => 2010-06-11
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/814124 | Anti-fuse memory cell | Jun 10, 2010 | Issued |
Array
(
[id] => 4578420
[patent_doc_number] => 07825454
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-11-02
[patent_title] => 'Method of forming an EEPROM device and structure therefor'
[patent_app_type] => utility
[patent_app_number] => 12/793403
[patent_app_country] => US
[patent_app_date] => 2010-06-03
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[pdf_file] => patents/07/825/07825454.pdf
[firstpage_image] =>[orig_patent_app_number] => 12793403
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/793403 | Method of forming an EEPROM device and structure therefor | Jun 2, 2010 | Issued |
Array
(
[id] => 9300206
[patent_doc_number] => 08648437
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-02-11
[patent_title] => 'Trench sidewall contact Schottky photodiode and related method of fabrication'
[patent_app_type] => utility
[patent_app_number] => 12/790390
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/790390 | Trench sidewall contact Schottky photodiode and related method of fabrication | May 27, 2010 | Issued |
Array
(
[id] => 9355921
[patent_doc_number] => 08674460
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[patent_issue_date] => 2014-03-18
[patent_title] => 'Mechanical isolation for MEMS electrical contacts'
[patent_app_type] => utility
[patent_app_number] => 12/790646
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[patent_app_date] => 2010-05-28
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/790646 | Mechanical isolation for MEMS electrical contacts | May 27, 2010 | Issued |
Array
(
[id] => 6235509
[patent_doc_number] => 20100267213
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-10-21
[patent_title] => 'SELF-ALIGNED COMPLEMENTARY LDMOS'
[patent_app_type] => utility
[patent_app_number] => 12/787677
[patent_app_country] => US
[patent_app_date] => 2010-05-26
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0267/20100267213.pdf
[firstpage_image] =>[orig_patent_app_number] => 12787677
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/787677 | Self-aligned complementary LDMOS | May 25, 2010 | Issued |
Array
(
[id] => 6540201
[patent_doc_number] => 20100221859
[patent_country] => US
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[patent_issue_date] => 2010-09-02
[patent_title] => 'Semiconductor Structure and Method for Manufacturing the Same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/781135 | Semiconductor structure and method for manufacturing the same | May 16, 2010 | Issued |
Array
(
[id] => 7522988
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[patent_issue_date] => 2011-09-27
[patent_title] => 'Method for manufacturing semiconductor device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/760573 | Method for manufacturing semiconductor device | Apr 14, 2010 | Issued |
Array
(
[id] => 6433288
[patent_doc_number] => 20100187691
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[patent_kind] => A1
[patent_issue_date] => 2010-07-29
[patent_title] => 'CHIP PACKAGE WITHOUT CORE AND STACKED CHIP PACKAGE STRUCTURE'
[patent_app_type] => utility
[patent_app_number] => 12/756368
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/756368 | CHIP PACKAGE WITHOUT CORE AND STACKED CHIP PACKAGE STRUCTURE | Apr 7, 2010 | Abandoned |
Array
(
[id] => 6433290
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/756377 | Chip package without core and stacked chip package structure | Apr 7, 2010 | Issued |
Array
(
[id] => 6432935
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[patent_title] => 'SEMICONDUCTOR DEVICE COMPRISING NMOS AND PMOS TRANSISTORS WITH EMBEDDED SI/GE MATERIAL FOR CREATING TENSILE AND COMPRESSIVE STRAIN'
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Array
(
[id] => 4533135
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[patent_title] => 'Fin field effect transistor and method of manufacturing the same'
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Array
(
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Array
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Array
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Array
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Array
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Array
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[patent_title] => 'Double Flip-Chip LED Package Components'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/715795 | Double flip-chip LED package components | Mar 1, 2010 | Issued |