Search

Hoai V. Pham

Examiner (ID: 18096)

Most Active Art Unit
2892
Art Unit(s)
2814, 2892, 2811
Total Applications
2250
Issued Applications
2043
Pending Applications
85
Abandoned Applications
160

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5419761 [patent_doc_number] => 20090146215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-11 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/327271 [patent_app_country] => US [patent_app_date] => 2008-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5442 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0146/20090146215.pdf [firstpage_image] =>[orig_patent_app_number] => 12327271 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/327271
Semiconductor device and method for fabricating the same Dec 2, 2008 Issued
Array ( [id] => 4443605 [patent_doc_number] => 07928505 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-19 [patent_title] => 'Semiconductor device with vertical trench and lightly doped region' [patent_app_type] => utility [patent_app_number] => 12/326392 [patent_app_country] => US [patent_app_date] => 2008-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 5284 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/928/07928505.pdf [firstpage_image] =>[orig_patent_app_number] => 12326392 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/326392
Semiconductor device with vertical trench and lightly doped region Dec 1, 2008 Issued
Array ( [id] => 9455766 [patent_doc_number] => 08716778 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-06 [patent_title] => 'Metal-insulator-metal capacitors' [patent_app_type] => utility [patent_app_number] => 12/272671 [patent_app_country] => US [patent_app_date] => 2008-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 6941 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12272671 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/272671
Metal-insulator-metal capacitors Nov 16, 2008 Issued
Array ( [id] => 6518721 [patent_doc_number] => 20100123188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-20 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING TRENCH SHIELD ELECTRODE STRUCTURE' [patent_app_type] => utility [patent_app_number] => 12/271041 [patent_app_country] => US [patent_app_date] => 2008-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8429 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0123/20100123188.pdf [firstpage_image] =>[orig_patent_app_number] => 12271041 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/271041
Semiconductor device having trench shield electrode structure Nov 13, 2008 Issued
Array ( [id] => 5542745 [patent_doc_number] => 20090152622 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-18 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/271102 [patent_app_country] => US [patent_app_date] => 2008-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3992 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0152/20090152622.pdf [firstpage_image] =>[orig_patent_app_number] => 12271102 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/271102
Semiconductor device having SiGe semiconductor regions Nov 13, 2008 Issued
Array ( [id] => 6519469 [patent_doc_number] => 20100123250 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-20 [patent_title] => 'Feature Patterning Methods and Structures Thereof' [patent_app_type] => utility [patent_app_number] => 12/271606 [patent_app_country] => US [patent_app_date] => 2008-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5286 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0123/20100123250.pdf [firstpage_image] =>[orig_patent_app_number] => 12271606 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/271606
Feature patterning methods and structures thereof Nov 13, 2008 Issued
Array ( [id] => 6518773 [patent_doc_number] => 20100123193 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-20 [patent_title] => 'SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE' [patent_app_type] => utility [patent_app_number] => 12/271092 [patent_app_country] => US [patent_app_date] => 2008-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 7530 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0123/20100123193.pdf [firstpage_image] =>[orig_patent_app_number] => 12271092 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/271092
SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE Nov 13, 2008 Abandoned
Array ( [id] => 6215983 [patent_doc_number] => 20100052076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-04 [patent_title] => 'METHOD OF FABRICATING HIGH-K POLY GATE DEVICE' [patent_app_type] => utility [patent_app_number] => 12/270311 [patent_app_country] => US [patent_app_date] => 2008-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3403 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20100052076.pdf [firstpage_image] =>[orig_patent_app_number] => 12270311 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/270311
METHOD OF FABRICATING HIGH-K POLY GATE DEVICE Nov 12, 2008 Abandoned
Array ( [id] => 9239664 [patent_doc_number] => 08604457 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-10 [patent_title] => 'Phase-change memory element' [patent_app_type] => utility [patent_app_number] => 12/269282 [patent_app_country] => US [patent_app_date] => 2008-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 23 [patent_no_of_words] => 3008 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12269282 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/269282
Phase-change memory element Nov 11, 2008 Issued
Array ( [id] => 4634924 [patent_doc_number] => 08013377 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-06 [patent_title] => 'Method for producing an integrated circuit and arrangement comprising a substrate' [patent_app_type] => utility [patent_app_number] => 12/269612 [patent_app_country] => US [patent_app_date] => 2008-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 3264 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/013/08013377.pdf [firstpage_image] =>[orig_patent_app_number] => 12269612 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/269612
Method for producing an integrated circuit and arrangement comprising a substrate Nov 11, 2008 Issued
Array ( [id] => 4574939 [patent_doc_number] => 07859047 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-28 [patent_title] => 'Shielded gate trench FET with the shield and gate electrodes connected together in non-active region' [patent_app_type] => utility [patent_app_number] => 12/268616 [patent_app_country] => US [patent_app_date] => 2008-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 2902 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/859/07859047.pdf [firstpage_image] =>[orig_patent_app_number] => 12268616 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/268616
Shielded gate trench FET with the shield and gate electrodes connected together in non-active region Nov 10, 2008 Issued
Array ( [id] => 5275502 [patent_doc_number] => 20090127634 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-21 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/268506 [patent_app_country] => US [patent_app_date] => 2008-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 11397 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20090127634.pdf [firstpage_image] =>[orig_patent_app_number] => 12268506 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/268506
Semiconductor device with dummy pattern within active region and method of manufacturing the same Nov 10, 2008 Issued
Array ( [id] => 5432151 [patent_doc_number] => 20090166737 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-02 [patent_title] => 'Method for Manufacturing a Transistor' [patent_app_type] => utility [patent_app_number] => 12/269021 [patent_app_country] => US [patent_app_date] => 2008-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1778 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0166/20090166737.pdf [firstpage_image] =>[orig_patent_app_number] => 12269021 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/269021
Method for manufacturing a transistor Nov 10, 2008 Issued
Array ( [id] => 6272243 [patent_doc_number] => 20100117221 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-13 [patent_title] => 'Capped Wafer Method and Apparatus' [patent_app_type] => utility [patent_app_number] => 12/268605 [patent_app_country] => US [patent_app_date] => 2008-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3801 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20100117221.pdf [firstpage_image] =>[orig_patent_app_number] => 12268605 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/268605
Capped wafer method and apparatus Nov 10, 2008 Issued
Array ( [id] => 5477719 [patent_doc_number] => 20090200676 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-13 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/268712 [patent_app_country] => US [patent_app_date] => 2008-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 9098 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0200/20090200676.pdf [firstpage_image] =>[orig_patent_app_number] => 12268712 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/268712
Semiconductor device Nov 10, 2008 Issued
Array ( [id] => 6271595 [patent_doc_number] => 20100117049 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-13 [patent_title] => 'MEMORY CELL ACCESS DEVICE HAVING A PN-JUNCTION WITH POLYCRYSTALLINE PLUG AND SINGLE-CRYSTAL SEMICONDUCTOR REGIONS' [patent_app_type] => utility [patent_app_number] => 12/267492 [patent_app_country] => US [patent_app_date] => 2008-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 80 [patent_figures_cnt] => 80 [patent_no_of_words] => 15780 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20100117049.pdf [firstpage_image] =>[orig_patent_app_number] => 12267492 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/267492
Memory cell access device having a pn-junction with polycrystalline plug and single-crystal semiconductor regions Nov 6, 2008 Issued
Array ( [id] => 5541 [patent_doc_number] => 07812429 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-12 [patent_title] => 'Semiconductor device and manufacturing method of the same' [patent_app_type] => utility [patent_app_number] => 12/266882 [patent_app_country] => US [patent_app_date] => 2008-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 10148 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 308 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/812/07812429.pdf [firstpage_image] =>[orig_patent_app_number] => 12266882 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/266882
Semiconductor device and manufacturing method of the same Nov 6, 2008 Issued
Array ( [id] => 174180 [patent_doc_number] => 07659559 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-09 [patent_title] => 'Semiconductor package having insulated metal substrate and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 12/264292 [patent_app_country] => US [patent_app_date] => 2008-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 3535 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/659/07659559.pdf [firstpage_image] =>[orig_patent_app_number] => 12264292 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/264292
Semiconductor package having insulated metal substrate and method of fabricating the same Nov 3, 2008 Issued
Array ( [id] => 9086952 [patent_doc_number] => 08558383 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-15 [patent_title] => 'Post passivation structure for a semiconductor device and packaging process for same' [patent_app_type] => utility [patent_app_number] => 12/264271 [patent_app_country] => US [patent_app_date] => 2008-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 31 [patent_no_of_words] => 9274 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12264271 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/264271
Post passivation structure for a semiconductor device and packaging process for same Nov 3, 2008 Issued
Array ( [id] => 74077 [patent_doc_number] => 07749850 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-06 [patent_title] => 'Method for manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/263592 [patent_app_country] => US [patent_app_date] => 2008-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 84 [patent_no_of_words] => 17003 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/749/07749850.pdf [firstpage_image] =>[orig_patent_app_number] => 12263592 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/263592
Method for manufacturing semiconductor device Nov 2, 2008 Issued
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