
Hoai V. Pham
Examiner (ID: 18096)
| Most Active Art Unit | 2892 |
| Art Unit(s) | 2814, 2892, 2811 |
| Total Applications | 2250 |
| Issued Applications | 2043 |
| Pending Applications | 85 |
| Abandoned Applications | 160 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4907149
[patent_doc_number] => 20080017915
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-24
[patent_title] => 'Method of Fabricating Non-Volatile Memory Integrated Circuit Device and Non-Volatile Memory Integrated Circuit Device Fabricated Using the Same'
[patent_app_type] => utility
[patent_app_number] => 11/763137
[patent_app_country] => US
[patent_app_date] => 2007-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 7590
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0017/20080017915.pdf
[firstpage_image] =>[orig_patent_app_number] => 11763137
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/763137 | Method of fabricating non-volatile memory integrated circuit device and non-volatile memory integrated circuit device fabricated using the same | Jun 13, 2007 | Issued |
Array
(
[id] => 5014123
[patent_doc_number] => 20070257331
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-11-08
[patent_title] => 'ANTI-FUSE MEMORY CELL'
[patent_app_type] => utility
[patent_app_number] => 11/762552
[patent_app_country] => US
[patent_app_date] => 2007-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 14189
[patent_no_of_claims] => 36
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[pdf_file] => publications/A1/0257/20070257331.pdf
[firstpage_image] =>[orig_patent_app_number] => 11762552
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/762552 | Anti-fuse memory cell | Jun 12, 2007 | Issued |
Array
(
[id] => 131503
[patent_doc_number] => 07700427
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-04-20
[patent_title] => 'Integrated circuit having a Fin structure'
[patent_app_type] => utility
[patent_app_number] => 11/762582
[patent_app_country] => US
[patent_app_date] => 2007-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[pdf_file] => patents/07/700/07700427.pdf
[firstpage_image] =>[orig_patent_app_number] => 11762582
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/762582 | Integrated circuit having a Fin structure | Jun 12, 2007 | Issued |
Array
(
[id] => 197549
[patent_doc_number] => 07638848
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-12-29
[patent_title] => 'Semiconductor apparatus with improved ESD withstanding voltage'
[patent_app_type] => utility
[patent_app_number] => 11/761522
[patent_app_country] => US
[patent_app_date] => 2007-06-12
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 5168
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/638/07638848.pdf
[firstpage_image] =>[orig_patent_app_number] => 11761522
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/761522 | Semiconductor apparatus with improved ESD withstanding voltage | Jun 11, 2007 | Issued |
Array
(
[id] => 4708027
[patent_doc_number] => 20080296553
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-04
[patent_title] => 'INTEGRATED CIRCUIT HAVING CONTACT INCLUDING MATERIAL BETWEEN SIDEWALLS'
[patent_app_type] => utility
[patent_app_number] => 11/757712
[patent_app_country] => US
[patent_app_date] => 2007-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => publications/A1/0296/20080296553.pdf
[firstpage_image] =>[orig_patent_app_number] => 11757712
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/757712 | Integrated circuit having contact including material between sidewalls | Jun 3, 2007 | Issued |
Array
(
[id] => 63587
[patent_doc_number] => 07763928
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-07-27
[patent_title] => 'Multi-time programmable memory'
[patent_app_type] => utility
[patent_app_number] => 11/755752
[patent_app_country] => US
[patent_app_date] => 2007-05-31
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/763/07763928.pdf
[firstpage_image] =>[orig_patent_app_number] => 11755752
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/755752 | Multi-time programmable memory | May 30, 2007 | Issued |
Array
(
[id] => 4654905
[patent_doc_number] => 20080023765
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-31
[patent_title] => 'Semiconductor Devices and Methods of Fabricating the Same'
[patent_app_type] => utility
[patent_app_number] => 11/756122
[patent_app_country] => US
[patent_app_date] => 2007-05-31
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0023/20080023765.pdf
[firstpage_image] =>[orig_patent_app_number] => 11756122
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/756122 | Semiconductor Devices and Methods of Fabricating the Same | May 30, 2007 | Abandoned |
Array
(
[id] => 5060337
[patent_doc_number] => 20070221974
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-09-27
[patent_title] => 'Method for Forming Ferroelectric Memory Capacitor'
[patent_app_type] => utility
[patent_app_number] => 11/756372
[patent_app_country] => US
[patent_app_date] => 2007-05-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0221/20070221974.pdf
[firstpage_image] =>[orig_patent_app_number] => 11756372
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/756372 | Method for Forming Ferroelectric Memory Capacitor | May 30, 2007 | Abandoned |
Array
(
[id] => 186007
[patent_doc_number] => 07646061
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-01-12
[patent_title] => 'Power semiconductor component with charge compensation structure and method for producing the same'
[patent_app_type] => utility
[patent_app_number] => 11/754742
[patent_app_country] => US
[patent_app_date] => 2007-05-29
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/646/07646061.pdf
[firstpage_image] =>[orig_patent_app_number] => 11754742
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/754742 | Power semiconductor component with charge compensation structure and method for producing the same | May 28, 2007 | Issued |
Array
(
[id] => 904267
[patent_doc_number] => 07335928
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-02-26
[patent_title] => 'Semiconductor device having a metal conductor in ohmic contact with the gate region on the bottom of each the first groove'
[patent_app_type] => utility
[patent_app_number] => 11/802810
[patent_app_country] => US
[patent_app_date] => 2007-05-25
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/335/07335928.pdf
[firstpage_image] =>[orig_patent_app_number] => 11802810
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/802810 | Semiconductor device having a metal conductor in ohmic contact with the gate region on the bottom of each the first groove | May 24, 2007 | Issued |
Array
(
[id] => 236266
[patent_doc_number] => 07595247
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-09-29
[patent_title] => 'Halo-first ultra-thin SOI FET for superior short channel control'
[patent_app_type] => utility
[patent_app_number] => 11/753862
[patent_app_country] => US
[patent_app_date] => 2007-05-25
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[pdf_file] => patents/07/595/07595247.pdf
[firstpage_image] =>[orig_patent_app_number] => 11753862
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/753862 | Halo-first ultra-thin SOI FET for superior short channel control | May 24, 2007 | Issued |
Array
(
[id] => 904512
[patent_doc_number] => 07331737
[patent_country] => US
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[patent_issue_date] => 2008-02-19
[patent_title] => 'Method of forming a semiconductor device having bonding pad of the second chip thinner than bonding pad of the first chip'
[patent_app_type] => utility
[patent_app_number] => 11/802363
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/802363 | Method of forming a semiconductor device having bonding pad of the second chip thinner than bonding pad of the first chip | May 21, 2007 | Issued |
Array
(
[id] => 4775892
[patent_doc_number] => 20080283890
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-11-20
[patent_title] => 'DEEP TRENCH INTER-WELL ISOLATION STRUCTURE'
[patent_app_type] => utility
[patent_app_number] => 11/748532
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[firstpage_image] =>[orig_patent_app_number] => 11748532
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/748532 | Deep trench inter-well isolation structure | May 14, 2007 | Issued |
Array
(
[id] => 4890697
[patent_doc_number] => 20080099794
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[patent_issue_date] => 2008-05-01
[patent_title] => 'SEMICONDUCTOR DEVICE COMPRISING NMOS AND PMOS TRANSISTORS WITH EMBEDDED SI/GE MATERIAL FOR CREATING TENSILE AND COMPRESSIVE STRAIN'
[patent_app_type] => utility
[patent_app_number] => 11/748902
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[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 11748902
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/748902 | Semiconductor device comprising NMOS and PMOS transistors with embedded Si/Ge material for creating tensile and compressive strain | May 14, 2007 | Issued |
Array
(
[id] => 250765
[patent_doc_number] => 07582521
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-09-01
[patent_title] => 'Dual metal gates for mugfet device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/744322 | Dual metal gates for mugfet device | May 3, 2007 | Issued |
Array
(
[id] => 285843
[patent_doc_number] => 07550772
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[patent_issue_date] => 2009-06-23
[patent_title] => 'Image display device and manufacturing method thereof'
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[firstpage_image] =>[orig_patent_app_number] => 11741272
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/741272 | Image display device and manufacturing method thereof | Apr 26, 2007 | Issued |
Array
(
[id] => 300166
[patent_doc_number] => 07538369
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[patent_issue_date] => 2009-05-26
[patent_title] => 'Resistance-change-type fuse circuit'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/741222 | Resistance-change-type fuse circuit | Apr 26, 2007 | Issued |
Array
(
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/739122 | Semiconductor power module including epoxy resin coating | Apr 23, 2007 | Issued |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/738722 | Semiconductor device and method of manufacturing the same | Apr 22, 2007 | Issued |