Search

Hoai V. Pham

Examiner (ID: 18096)

Most Active Art Unit
2892
Art Unit(s)
2814, 2892, 2811
Total Applications
2250
Issued Applications
2043
Pending Applications
85
Abandoned Applications
160

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 278330 [patent_doc_number] => 07557407 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-07-07 [patent_title] => 'Recessed gate structure and method for preparing the same' [patent_app_type] => utility [patent_app_number] => 11/435848 [patent_app_country] => US [patent_app_date] => 2006-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 2585 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/557/07557407.pdf [firstpage_image] =>[orig_patent_app_number] => 11435848 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/435848
Recessed gate structure and method for preparing the same May 17, 2006 Issued
Array ( [id] => 225260 [patent_doc_number] => 07605445 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-10-20 [patent_title] => 'Sealed nitride layer for integrated circuits' [patent_app_type] => utility [patent_app_number] => 11/436448 [patent_app_country] => US [patent_app_date] => 2006-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3281 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/605/07605445.pdf [firstpage_image] =>[orig_patent_app_number] => 11436448 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/436448
Sealed nitride layer for integrated circuits May 17, 2006 Issued
Array ( [id] => 386972 [patent_doc_number] => 07304341 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-12-04 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/415069 [patent_app_country] => US [patent_app_date] => 2006-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 29 [patent_no_of_words] => 7605 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/304/07304341.pdf [firstpage_image] =>[orig_patent_app_number] => 11415069 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/415069
Semiconductor device and method for fabricating the same May 1, 2006 Issued
Array ( [id] => 422151 [patent_doc_number] => 07274083 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-09-25 [patent_title] => 'Semiconductor device with surge current protection and method of making the same' [patent_app_type] => utility [patent_app_number] => 11/415279 [patent_app_country] => US [patent_app_date] => 2006-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 3387 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/274/07274083.pdf [firstpage_image] =>[orig_patent_app_number] => 11415279 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/415279
Semiconductor device with surge current protection and method of making the same May 1, 2006 Issued
Array ( [id] => 4971400 [patent_doc_number] => 20070111402 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-17 [patent_title] => 'Production and packaging control for repaired integrated circuits' [patent_app_type] => utility [patent_app_number] => 11/413468 [patent_app_country] => US [patent_app_date] => 2006-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3013 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0111/20070111402.pdf [firstpage_image] =>[orig_patent_app_number] => 11413468 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/413468
Production and packaging control for repaired integrated circuits Apr 27, 2006 Issued
Array ( [id] => 7689433 [patent_doc_number] => 20070105265 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-10 [patent_title] => 'Front side illuminated photodiode with backside bump' [patent_app_type] => utility [patent_app_number] => 11/414128 [patent_app_country] => US [patent_app_date] => 2006-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5026 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20070105265.pdf [firstpage_image] =>[orig_patent_app_number] => 11414128 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/414128
Front side illuminated photodiode with backside bump Apr 27, 2006 Issued
Array ( [id] => 5834829 [patent_doc_number] => 20060246660 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-02 [patent_title] => 'FLASH MEMORY DEVICE CAPABLE OF ERASING FLASH BLOCKS IN SOI SUBSTRATE BASED ON BACK-BIAS, METHOD FOR MANUFACTURING THE SAME, AND FLASH BLOCK ERASION METHOD AND STRUCTURE THEREOF' [patent_app_type] => utility [patent_app_number] => 11/380347 [patent_app_country] => US [patent_app_date] => 2006-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3024 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0246/20060246660.pdf [firstpage_image] =>[orig_patent_app_number] => 11380347 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/380347
Flash memory device capable of erasing flash blocks in SOI substrate based on back-bias, method for manufacturing the same, and flash block erasion method and structure thereof Apr 25, 2006 Issued
Array ( [id] => 5616944 [patent_doc_number] => 20060186476 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-24 [patent_title] => 'Method of manufacturing thin film transistor' [patent_app_type] => utility [patent_app_number] => 11/411058 [patent_app_country] => US [patent_app_date] => 2006-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3790 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0186/20060186476.pdf [firstpage_image] =>[orig_patent_app_number] => 11411058 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/411058
Method of manufacturing thin film transistor Apr 24, 2006 Issued
Array ( [id] => 5616916 [patent_doc_number] => 20060186448 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-24 [patent_title] => 'Semiconductor device memory cell' [patent_app_type] => utility [patent_app_number] => 11/409094 [patent_app_country] => US [patent_app_date] => 2006-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8510 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0186/20060186448.pdf [firstpage_image] =>[orig_patent_app_number] => 11409094 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/409094
Semiconductor device memory cell Apr 23, 2006 Issued
Array ( [id] => 5642786 [patent_doc_number] => 20060281241 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-14 [patent_title] => 'CMOS fabrication' [patent_app_type] => utility [patent_app_number] => 11/408112 [patent_app_country] => US [patent_app_date] => 2006-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5857 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0281/20060281241.pdf [firstpage_image] =>[orig_patent_app_number] => 11408112 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/408112
CMOS fabrication Apr 19, 2006 Issued
Array ( [id] => 5210551 [patent_doc_number] => 20070249135 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-25 [patent_title] => 'Collector tailored structures for integration of binary junction transistors' [patent_app_type] => utility [patent_app_number] => 11/406788 [patent_app_country] => US [patent_app_date] => 2006-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6289 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0249/20070249135.pdf [firstpage_image] =>[orig_patent_app_number] => 11406788 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/406788
Collector tailored structures for integration of binary junction transistors Apr 18, 2006 Issued
Array ( [id] => 5157465 [patent_doc_number] => 20070170509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-26 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/401928 [patent_app_country] => US [patent_app_date] => 2006-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5879 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20070170509.pdf [firstpage_image] =>[orig_patent_app_number] => 11401928 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/401928
Semiconductor device having a fin and method of manufacturing the same Apr 11, 2006 Issued
Array ( [id] => 4968502 [patent_doc_number] => 20070108504 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-17 [patent_title] => 'NON-VOLATILE MEMORY AND MANUFACTURING METHOD AND OPERATING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 11/308507 [patent_app_country] => US [patent_app_date] => 2006-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 10947 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20070108504.pdf [firstpage_image] =>[orig_patent_app_number] => 11308507 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/308507
NON-VOLATILE MEMORY AND MANUFACTURING METHOD AND OPERATING METHOD THEREOF Mar 30, 2006 Abandoned
Array ( [id] => 530472 [patent_doc_number] => 07179686 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-20 [patent_title] => 'Manufacturing method of semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/392558 [patent_app_country] => US [patent_app_date] => 2006-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 7126 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/179/07179686.pdf [firstpage_image] =>[orig_patent_app_number] => 11392558 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/392558
Manufacturing method of semiconductor device Mar 29, 2006 Issued
Array ( [id] => 5868997 [patent_doc_number] => 20060163614 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-27 [patent_title] => 'Multi-layer memory arrays' [patent_app_type] => utility [patent_app_number] => 11/392343 [patent_app_country] => US [patent_app_date] => 2006-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5322 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0163/20060163614.pdf [firstpage_image] =>[orig_patent_app_number] => 11392343 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/392343
Multi-layer memory arrays Mar 28, 2006 Abandoned
Array ( [id] => 556793 [patent_doc_number] => 07157305 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-02 [patent_title] => 'Forming multi-layer memory arrays' [patent_app_type] => utility [patent_app_number] => 11/392290 [patent_app_country] => US [patent_app_date] => 2006-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4916 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/157/07157305.pdf [firstpage_image] =>[orig_patent_app_number] => 11392290 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/392290
Forming multi-layer memory arrays Mar 28, 2006 Issued
Array ( [id] => 5869061 [patent_doc_number] => 20060163678 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-27 [patent_title] => 'Semiconductor device and method for manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/390128 [patent_app_country] => US [patent_app_date] => 2006-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 7765 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0163/20060163678.pdf [firstpage_image] =>[orig_patent_app_number] => 11390128 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/390128
Semiconductor device and method for manufacturing semiconductor device Mar 27, 2006 Abandoned
Array ( [id] => 5675546 [patent_doc_number] => 20060180901 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-17 [patent_title] => 'Method and apparatus for increasing the immunity of new generation microprocessors from ESD events' [patent_app_type] => utility [patent_app_number] => 11/390577 [patent_app_country] => US [patent_app_date] => 2006-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2257 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0180/20060180901.pdf [firstpage_image] =>[orig_patent_app_number] => 11390577 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/390577
Method and apparatus for increasing the immunity of new generation microprocessors from ESD events Mar 26, 2006 Issued
Array ( [id] => 5680850 [patent_doc_number] => 20060197117 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-07 [patent_title] => 'Stacked semiconductor device and method of fabrication' [patent_app_type] => utility [patent_app_number] => 11/368418 [patent_app_country] => US [patent_app_date] => 2006-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3776 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0197/20060197117.pdf [firstpage_image] =>[orig_patent_app_number] => 11368418 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/368418
Semiconductor device including upper and lower transistors and interconnection between upper and lower transistors Mar 6, 2006 Issued
Array ( [id] => 5169326 [patent_doc_number] => 20070069757 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-29 [patent_title] => 'Inspection method of contact failure of semiconductor device and semiconductor device to which inspection method is applied' [patent_app_type] => utility [patent_app_number] => 11/368758 [patent_app_country] => US [patent_app_date] => 2006-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 8449 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0069/20070069757.pdf [firstpage_image] =>[orig_patent_app_number] => 11368758 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/368758
Inspection method of contact failure of semiconductor device and semiconductor device to which inspection method is applied Mar 6, 2006 Issued
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