
Hoai V. Pham
Examiner (ID: 18096)
| Most Active Art Unit | 2892 |
| Art Unit(s) | 2814, 2892, 2811 |
| Total Applications | 2250 |
| Issued Applications | 2043 |
| Pending Applications | 85 |
| Abandoned Applications | 160 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5606164
[patent_doc_number] => 20060267680
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-11-30
[patent_title] => 'Component arrangement having a transistor and an open-load detector'
[patent_app_type] => utility
[patent_app_number] => 11/369279
[patent_app_country] => US
[patent_app_date] => 2006-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 3577
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[pdf_file] => publications/A1/0267/20060267680.pdf
[firstpage_image] =>[orig_patent_app_number] => 11369279
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/369279 | Component arrangement having a transistor and an open-load detector | Mar 6, 2006 | Issued |
Array
(
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[patent_doc_number] => 20060175657
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-08-10
[patent_title] => 'Advanced CMOS using super steep retrograde wells'
[patent_app_type] => utility
[patent_app_number] => 11/362908
[patent_app_country] => US
[patent_app_date] => 2006-02-28
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/362908 | Advanced CMOS using super steep retrograde wells | Feb 27, 2006 | Issued |
Array
(
[id] => 443762
[patent_doc_number] => 07256500
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[patent_kind] => B2
[patent_issue_date] => 2007-08-14
[patent_title] => 'Semiconductor device using metal nitride as insulating film'
[patent_app_type] => utility
[patent_app_number] => 11/362872
[patent_app_country] => US
[patent_app_date] => 2006-02-28
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[pdf_file] => patents/07/256/07256500.pdf
[firstpage_image] =>[orig_patent_app_number] => 11362872
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/362872 | Semiconductor device using metal nitride as insulating film | Feb 27, 2006 | Issued |
Array
(
[id] => 5652939
[patent_doc_number] => 20060138674
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-29
[patent_title] => 'Method for fabricating thermally enhanced semiconductor package'
[patent_app_type] => utility
[patent_app_number] => 11/362419
[patent_app_country] => US
[patent_app_date] => 2006-02-23
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[pdf_file] => publications/A1/0138/20060138674.pdf
[firstpage_image] =>[orig_patent_app_number] => 11362419
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/362419 | Method for fabricating thermally enhanced semiconductor package | Feb 22, 2006 | Issued |
Array
(
[id] => 5645827
[patent_doc_number] => 20060131559
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-22
[patent_title] => 'Method of manufacturing a semiconductor device with a silicon-germanium gate electrode'
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[patent_app_number] => 11/353990
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[patent_app_date] => 2006-02-15
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[pdf_file] => publications/A1/0131/20060131559.pdf
[firstpage_image] =>[orig_patent_app_number] => 11353990
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/353990 | Method of manufacturing a semiconductor device with a silicon-germanium gate electrode | Feb 14, 2006 | Issued |
Array
(
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[patent_doc_number] => 07256485
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[patent_issue_date] => 2007-08-14
[patent_title] => 'Semiconductor device having bonding pad of the first chip thicker than bonding pad of the second chip'
[patent_app_type] => utility
[patent_app_number] => 11/350889
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[pdf_file] => patents/07/256/07256485.pdf
[firstpage_image] =>[orig_patent_app_number] => 11350889
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/350889 | Semiconductor device having bonding pad of the first chip thicker than bonding pad of the second chip | Feb 9, 2006 | Issued |
Array
(
[id] => 563798
[patent_doc_number] => 07157776
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[patent_issue_date] => 2007-01-02
[patent_title] => 'Semiconductor device, manufacturing method thereof, and CMOS integrated circuit device'
[patent_app_type] => utility
[patent_app_number] => 11/345238
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[patent_app_date] => 2006-02-02
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[pdf_file] => patents/07/157/07157776.pdf
[firstpage_image] =>[orig_patent_app_number] => 11345238
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/345238 | Semiconductor device, manufacturing method thereof, and CMOS integrated circuit device | Feb 1, 2006 | Issued |
Array
(
[id] => 5670316
[patent_doc_number] => 20060175670
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-08-10
[patent_title] => 'Field effect transistor and method of manufacturing a field effect transistor'
[patent_app_type] => utility
[patent_app_number] => 11/340699
[patent_app_country] => US
[patent_app_date] => 2006-01-27
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 11340699
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/340699 | Field effect transistor and method of manufacturing a field effect transistor | Jan 26, 2006 | Abandoned |
Array
(
[id] => 5008113
[patent_doc_number] => 20070278590
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-12-06
[patent_title] => 'CMOS WITH DUAL METAL GATE'
[patent_app_type] => utility
[patent_app_number] => 11/306748
[patent_app_country] => US
[patent_app_date] => 2006-01-10
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[firstpage_image] =>[orig_patent_app_number] => 11306748
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/306748 | CMOS with dual metal gate | Jan 9, 2006 | Issued |
Array
(
[id] => 4954990
[patent_doc_number] => 20080188014
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-08-07
[patent_title] => 'FEED FORWARD SILICIDE CONTROL SCHEME BASED ON SPACER HEIGHT CONTROLLING PRECLEAN TIME'
[patent_app_type] => utility
[patent_app_number] => 11/306717
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[patent_app_date] => 2006-01-09
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0188/20080188014.pdf
[firstpage_image] =>[orig_patent_app_number] => 11306717
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/306717 | Feed forward silicide control scheme based on spacer height controlling preclean time | Jan 8, 2006 | Issued |
Array
(
[id] => 915332
[patent_doc_number] => 07326986
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-02-05
[patent_title] => 'Trench memory'
[patent_app_type] => utility
[patent_app_number] => 11/306669
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/306669 | Trench memory | Jan 5, 2006 | Issued |
Array
(
[id] => 5152126
[patent_doc_number] => 20070035008
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[patent_title] => 'Thin IC package for improving heat dissipation from chip backside'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/322409 | Thin IC package for improving heat dissipation from chip backside | Jan 2, 2006 | Abandoned |
Array
(
[id] => 5019521
[patent_doc_number] => 20070145487
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[patent_title] => 'Multigate device with recessed strain regions'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/320309 | Multigate device with recessed strain regions | Dec 26, 2005 | Issued |
Array
(
[id] => 282172
[patent_doc_number] => 07554173
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[patent_title] => 'Semiconductor device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/722112 | Semiconductor device | Dec 18, 2005 | Issued |
Array
(
[id] => 582975
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[patent_title] => 'Flexible MEMS thin film without manufactured substrate and process for producing the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/287427 | Flexible MEMS thin film without manufactured substrate and process for producing the same | Nov 27, 2005 | Issued |
Array
(
[id] => 512946
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/286669 | Light emitting diode module with high heat dissipation | Nov 24, 2005 | Issued |
Array
(
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Array
(
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/163118 | Inflected magnetoresistive structures and memory cells having inflected magnetoresistive structures | Oct 4, 2005 | Issued |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/230348 | Split gate field effect transistor device with aligned gate electrode sidewalls | Sep 19, 2005 | Abandoned |