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Hoang M. Nguyen

Examiner (ID: 3825, Phone: (571)272-4861 , Office: P/3748 )

Most Active Art Unit
3748
Art Unit(s)
3746, 3748, 3745, 2899, 3401
Total Applications
5350
Issued Applications
4270
Pending Applications
349
Abandoned Applications
767

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18124677 [patent_doc_number] => 20230010289 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-12 [patent_title] => PHOTOVOLTAIC MODULE WITH MASKED INTERCONNECTS AND A METHOD OF MANUFACTURING THEREOF [patent_app_type] => utility [patent_app_number] => 17/860847 [patent_app_country] => US [patent_app_date] => 2022-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3601 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17860847 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/860847
PHOTOVOLTAIC MODULE WITH MASKED INTERCONNECTS AND A METHOD OF MANUFACTURING THEREOF Jul 7, 2022 Pending
Array ( [id] => 18126008 [patent_doc_number] => 20230011627 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-12 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/857266 [patent_app_country] => US [patent_app_date] => 2022-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9117 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17857266 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/857266
SEMICONDUCTOR DEVICE Jul 4, 2022 Pending
Array ( [id] => 18456530 [patent_doc_number] => 20230197812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => HYBRID CHANNEL REGION FOR GATE ALL AROUND (GAA) TRANSISTOR STRUCTURES [patent_app_type] => utility [patent_app_number] => 17/553397 [patent_app_country] => US [patent_app_date] => 2021-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13348 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17553397 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/553397
HYBRID CHANNEL REGION FOR GATE ALL AROUND (GAA) TRANSISTOR STRUCTURES Dec 15, 2021 Pending
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