Search

Hoang X Ngo

Examiner (ID: 14525)

Most Active Art Unit
2852
Art Unit(s)
2852, 2851
Total Applications
2608
Issued Applications
2450
Pending Applications
70
Abandoned Applications
82

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19228627 [patent_doc_number] => 12008264 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-11 [patent_title] => Smart network interface controller host storage access [patent_app_type] => utility [patent_app_number] => 17/576601 [patent_app_country] => US [patent_app_date] => 2022-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4818 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17576601 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/576601
Smart network interface controller host storage access Jan 13, 2022 Issued
Array ( [id] => 18195810 [patent_doc_number] => 20230049329 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => SYSTEMS, METHODS, AND APPARATUS FOR PROCESSING DATA AT A STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 17/572621 [patent_app_country] => US [patent_app_date] => 2022-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13329 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17572621 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/572621
SYSTEMS, METHODS, AND APPARATUS FOR PROCESSING DATA AT A STORAGE DEVICE Jan 9, 2022 Pending
Array ( [id] => 18486808 [patent_doc_number] => 20230214154 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-06 [patent_title] => METHOD AND APPARATUS FOR PERFORMING ACCESS MANAGEMENT OF MEMORY DEVICE WITH AID OF BUFFER USAGE REDUCTION CONTROL [patent_app_type] => utility [patent_app_number] => 17/569451 [patent_app_country] => US [patent_app_date] => 2022-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11902 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17569451 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/569451
Method and apparatus for performing access management of memory device with aid of buffer usage reduction control Jan 4, 2022 Issued
Array ( [id] => 19375667 [patent_doc_number] => 12067237 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-20 [patent_title] => Flexible memory system [patent_app_type] => utility [patent_app_number] => 17/565315 [patent_app_country] => US [patent_app_date] => 2021-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3549 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17565315 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/565315
Flexible memory system Dec 28, 2021 Issued
Array ( [id] => 17706682 [patent_doc_number] => 20220206688 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => METHOD FOR INCREASING THE NUMBER OF APPLICATIONS IN A DEVICE HAVING A LIMITED MEMORY [patent_app_type] => utility [patent_app_number] => 17/558003 [patent_app_country] => US [patent_app_date] => 2021-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7828 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17558003 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/558003
Method for increasing the number of applications in a device having a limited memory Dec 20, 2021 Issued
Array ( [id] => 17674868 [patent_doc_number] => 20220188035 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => MEMORY WITH VIRTUAL PAGE SIZE [patent_app_type] => utility [patent_app_number] => 17/557818 [patent_app_country] => US [patent_app_date] => 2021-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16101 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17557818 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/557818
Memory with virtual page size Dec 20, 2021 Issued
Array ( [id] => 17507554 [patent_doc_number] => 20220100657 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-31 [patent_title] => DATA DEFINED CACHES FOR SPECULATIVE AND NORMAL EXECUTIONS [patent_app_type] => utility [patent_app_number] => 17/549397 [patent_app_country] => US [patent_app_date] => 2021-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 46366 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17549397 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/549397
Data defined caches for speculative and normal executions Dec 12, 2021 Issued
Array ( [id] => 18393274 [patent_doc_number] => 20230161494 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-25 [patent_title] => Selective Device Power State Recovery Method [patent_app_type] => utility [patent_app_number] => 17/456443 [patent_app_country] => US [patent_app_date] => 2021-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7273 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17456443 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/456443
Selective device power state recovery method Nov 23, 2021 Issued
Array ( [id] => 18720052 [patent_doc_number] => 11797397 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-24 [patent_title] => Hybrid NVRAM logging in filesystem namespace [patent_app_type] => utility [patent_app_number] => 17/513352 [patent_app_country] => US [patent_app_date] => 2021-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7060 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17513352 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/513352
Hybrid NVRAM logging in filesystem namespace Oct 27, 2021 Issued
Array ( [id] => 19122602 [patent_doc_number] => 11966588 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-23 [patent_title] => Flash memory usage management [patent_app_type] => utility [patent_app_number] => 17/511036 [patent_app_country] => US [patent_app_date] => 2021-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 14300 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17511036 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/511036
Flash memory usage management Oct 25, 2021 Issued
Array ( [id] => 17401492 [patent_doc_number] => 20220043582 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-10 [patent_title] => Read and Write Load Sharing in a Storage Array Via Partitioned Ownership of Data Blocks [patent_app_type] => utility [patent_app_number] => 17/509523 [patent_app_country] => US [patent_app_date] => 2021-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8628 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17509523 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/509523
Read and write load sharing in a storage array via partitioned ownership of data blocks Oct 24, 2021 Issued
Array ( [id] => 18336128 [patent_doc_number] => 20230128077 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-27 [patent_title] => System and Method for Aggregation of Write Commits To Control Written Block Size [patent_app_type] => utility [patent_app_number] => 17/508185 [patent_app_country] => US [patent_app_date] => 2021-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8424 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17508185 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/508185
System and Method for Aggregation of Write Commits To Control Written Block Size Oct 21, 2021 Pending
Array ( [id] => 19369718 [patent_doc_number] => 12061803 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-13 [patent_title] => System with increasing protected storage area and erase protection [patent_app_type] => utility [patent_app_number] => 17/499167 [patent_app_country] => US [patent_app_date] => 2021-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5876 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17499167 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/499167
System with increasing protected storage area and erase protection Oct 11, 2021 Issued
Array ( [id] => 18622170 [patent_doc_number] => 11755208 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-12 [patent_title] => Hybrid memory management of non-volatile memory (NVM) devices for use with recurrent neural networks [patent_app_type] => utility [patent_app_number] => 17/499572 [patent_app_country] => US [patent_app_date] => 2021-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 18665 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17499572 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/499572
Hybrid memory management of non-volatile memory (NVM) devices for use with recurrent neural networks Oct 11, 2021 Issued
Array ( [id] => 17372012 [patent_doc_number] => 20220027064 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-27 [patent_title] => TWO OR MORE LOGICAL ARRAYS HAVING ZONED DRIVES [patent_app_type] => utility [patent_app_number] => 17/497322 [patent_app_country] => US [patent_app_date] => 2021-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 36465 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17497322 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/497322
TWO OR MORE LOGICAL ARRAYS HAVING ZONED DRIVES Oct 7, 2021 Pending
Array ( [id] => 19136858 [patent_doc_number] => 11971815 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-30 [patent_title] => Write budget control of time-shift buffer for streaming devices [patent_app_type] => utility [patent_app_number] => 17/463397 [patent_app_country] => US [patent_app_date] => 2021-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8490 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17463397 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/463397
Write budget control of time-shift buffer for streaming devices Aug 30, 2021 Issued
Array ( [id] => 18606530 [patent_doc_number] => 11747994 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Power loss protection of data in memory devices [patent_app_type] => utility [patent_app_number] => 17/462335 [patent_app_country] => US [patent_app_date] => 2021-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 11420 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17462335 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/462335
Power loss protection of data in memory devices Aug 30, 2021 Issued
Array ( [id] => 17401481 [patent_doc_number] => 20220043571 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-10 [patent_title] => FILE OPERATIONS IN A DISTRIBUTED STORAGE SYSTEM [patent_app_type] => utility [patent_app_number] => 17/459663 [patent_app_country] => US [patent_app_date] => 2021-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5722 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17459663 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/459663
File operations in a distributed storage system Aug 26, 2021 Issued
Array ( [id] => 17294213 [patent_doc_number] => 20210390052 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-16 [patent_title] => Memory Interface Having Multiple Snoop Processors [patent_app_type] => utility [patent_app_number] => 17/446133 [patent_app_country] => US [patent_app_date] => 2021-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25253 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17446133 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/446133
Memory interface having multiple snoop processors Aug 25, 2021 Issued
Array ( [id] => 18519708 [patent_doc_number] => 11709599 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-25 [patent_title] => Memory controller and memory system [patent_app_type] => utility [patent_app_number] => 17/458135 [patent_app_country] => US [patent_app_date] => 2021-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 15247 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17458135 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/458135
Memory controller and memory system Aug 25, 2021 Issued
Menu