Search

Hong Yu

Examiner (ID: 18462, Phone: (571)270-1328 , Office: P/1613 )

Most Active Art Unit
1613
Art Unit(s)
1614, 1612, 1616, 1613
Total Applications
846
Issued Applications
219
Pending Applications
130
Abandoned Applications
520

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6336691 [patent_doc_number] => 20100083497 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-08 [patent_title] => 'SYSTEM AND METHOD FOR COUPLING A BATTERY WITHIN AN EMBEDDED SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/246200 [patent_app_country] => US [patent_app_date] => 2008-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4745 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0083/20100083497.pdf [firstpage_image] =>[orig_patent_app_number] => 12246200 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/246200
Method for coupling a battery within an embedded system Oct 5, 2008 Issued
Array ( [id] => 8110861 [patent_doc_number] => 08156640 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-17 [patent_title] => 'Substantially continuous layer of embedded transient protection for printed circuit boards' [patent_app_type] => utility [patent_app_number] => 12/245729 [patent_app_country] => US [patent_app_date] => 2008-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 18 [patent_no_of_words] => 4513 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/156/08156640.pdf [firstpage_image] =>[orig_patent_app_number] => 12245729 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/245729
Substantially continuous layer of embedded transient protection for printed circuit boards Oct 3, 2008 Issued
Array ( [id] => 4472816 [patent_doc_number] => 07944131 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-17 [patent_title] => 'Quartz crystal unit, quartz crystal oscillator and manufacturing method of the same' [patent_app_type] => utility [patent_app_number] => 12/286863 [patent_app_country] => US [patent_app_date] => 2008-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 13548 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 301 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/944/07944131.pdf [firstpage_image] =>[orig_patent_app_number] => 12286863 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/286863
Quartz crystal unit, quartz crystal oscillator and manufacturing method of the same Oct 1, 2008 Issued
Array ( [id] => 5412265 [patent_doc_number] => 20090038152 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-12 [patent_title] => 'Method for producing ink-jet head and ink-jet head' [patent_app_type] => utility [patent_app_number] => 12/232880 [patent_app_country] => US [patent_app_date] => 2008-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9729 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20090038152.pdf [firstpage_image] =>[orig_patent_app_number] => 12232880 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/232880
Method for producing ink-jet head and ink-jet head Sep 24, 2008 Issued
Array ( [id] => 5400812 [patent_doc_number] => 20090236125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-24 [patent_title] => 'Multi-layer board and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 12/232820 [patent_app_country] => US [patent_app_date] => 2008-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 3098 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0236/20090236125.pdf [firstpage_image] =>[orig_patent_app_number] => 12232820 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/232820
Method of manufacturing a multi-layer board Sep 23, 2008 Issued
Array ( [id] => 8350075 [patent_doc_number] => 08245393 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-08-21 [patent_title] => 'Method for fabricating a circuit board including aligned nanostructures' [patent_app_type] => utility [patent_app_number] => 12/234529 [patent_app_country] => US [patent_app_date] => 2008-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 5119 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12234529 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/234529
Method for fabricating a circuit board including aligned nanostructures Sep 18, 2008 Issued
Array ( [id] => 5296620 [patent_doc_number] => 20090011546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-08 [patent_title] => 'COOLING OF SUBSTRATE USING INTERPOSER CHANNELS' [patent_app_type] => utility [patent_app_number] => 12/212998 [patent_app_country] => US [patent_app_date] => 2008-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7115 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0011/20090011546.pdf [firstpage_image] =>[orig_patent_app_number] => 12212998 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/212998
Method of forming a substrate with interposer channels for cooling the substrate Sep 17, 2008 Issued
Array ( [id] => 5344755 [patent_doc_number] => 20090000116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-01 [patent_title] => 'Methods of Providing Semiconductor Components within Sockets' [patent_app_type] => utility [patent_app_number] => 12/208589 [patent_app_country] => US [patent_app_date] => 2008-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 5666 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0000/20090000116.pdf [firstpage_image] =>[orig_patent_app_number] => 12208589 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/208589
Methods of providing semiconductor components within sockets Sep 10, 2008 Issued
Array ( [id] => 5292494 [patent_doc_number] => 20090007420 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-08 [patent_title] => 'COMPONENT MOUNTING APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/202594 [patent_app_country] => US [patent_app_date] => 2008-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 14804 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20090007420.pdf [firstpage_image] =>[orig_patent_app_number] => 12202594 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/202594
Component mounting apparatus Sep 1, 2008 Issued
Array ( [id] => 6220297 [patent_doc_number] => 20100055392 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-04 [patent_title] => 'METHOD OF FABRICATING MULTI-LAYERED SUBSTRATE AND THE SUBSTRATE THEREOF' [patent_app_type] => utility [patent_app_number] => 12/199149 [patent_app_country] => US [patent_app_date] => 2008-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 3459 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0055/20100055392.pdf [firstpage_image] =>[orig_patent_app_number] => 12199149 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/199149
Method of fabricating multi-layered substrate Aug 26, 2008 Issued
Array ( [id] => 5292500 [patent_doc_number] => 20090007426 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-08 [patent_title] => 'Image forming apparatus and method of manufacturing electronic circuit using the same' [patent_app_type] => utility [patent_app_number] => 12/230280 [patent_app_country] => US [patent_app_date] => 2008-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 14001 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20090007426.pdf [firstpage_image] =>[orig_patent_app_number] => 12230280 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/230280
Method of manufacturing an electronic circuit formed on a substrate Aug 26, 2008 Issued
Array ( [id] => 5319275 [patent_doc_number] => 20090057265 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-05 [patent_title] => 'Method of manufacturing multilayer printed circuit board' [patent_app_type] => utility [patent_app_number] => 12/230219 [patent_app_country] => US [patent_app_date] => 2008-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5333 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20090057265.pdf [firstpage_image] =>[orig_patent_app_number] => 12230219 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/230219
Method of manufacturing multilayer printed circuit board Aug 25, 2008 Abandoned
Array ( [id] => 5333891 [patent_doc_number] => 20090050355 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-02-26 [patent_title] => 'Thermoplastic Films For Insulated Metal Substrates And Methods Of Manufacture Thereof' [patent_app_type] => utility [patent_app_number] => 12/195939 [patent_app_country] => US [patent_app_date] => 2008-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3147 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20090050355.pdf [firstpage_image] =>[orig_patent_app_number] => 12195939 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/195939
Method of assembling an insulated metal substrate Aug 20, 2008 Issued
Array ( [id] => 8150175 [patent_doc_number] => 08166649 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-01 [patent_title] => 'Method of forming an electroded sheet' [patent_app_type] => utility [patent_app_number] => 12/194839 [patent_app_country] => US [patent_app_date] => 2008-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 84 [patent_no_of_words] => 22873 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/166/08166649.pdf [firstpage_image] =>[orig_patent_app_number] => 12194839 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/194839
Method of forming an electroded sheet Aug 19, 2008 Issued
Array ( [id] => 6536750 [patent_doc_number] => 20100044096 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-02-25 [patent_title] => 'Horizontally Split Vias' [patent_app_type] => utility [patent_app_number] => 12/193842 [patent_app_country] => US [patent_app_date] => 2008-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6679 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20100044096.pdf [firstpage_image] =>[orig_patent_app_number] => 12193842 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/193842
Method of forming a substrate having a plurality of insulator layers Aug 18, 2008 Issued
Array ( [id] => 4792331 [patent_doc_number] => 20080293305 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-27 [patent_title] => 'WIRE LEAD GUIDE AND METHOD FOR TERMINATING A COMMUNICATIONS CABLE' [patent_app_type] => utility [patent_app_number] => 12/188380 [patent_app_country] => US [patent_app_date] => 2008-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5689 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0293/20080293305.pdf [firstpage_image] =>[orig_patent_app_number] => 12188380 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/188380
Method for terminating a telecommunications cable Aug 7, 2008 Issued
Array ( [id] => 997 [patent_doc_number] => 07814652 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-19 [patent_title] => 'Method of making through-hole vias in a substrate' [patent_app_type] => utility [patent_app_number] => 12/180169 [patent_app_country] => US [patent_app_date] => 2008-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 17 [patent_no_of_words] => 20233 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/814/07814652.pdf [firstpage_image] =>[orig_patent_app_number] => 12180169 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/180169
Method of making through-hole vias in a substrate Jul 24, 2008 Issued
Array ( [id] => 4428652 [patent_doc_number] => 07895741 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-01 [patent_title] => 'Method of producing a wired circuit board' [patent_app_type] => utility [patent_app_number] => 12/219599 [patent_app_country] => US [patent_app_date] => 2008-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6097 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/895/07895741.pdf [firstpage_image] =>[orig_patent_app_number] => 12219599 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/219599
Method of producing a wired circuit board Jul 23, 2008 Issued
Array ( [id] => 8384043 [patent_doc_number] => 08261432 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-11 [patent_title] => 'Disk spacer drop-proofing tool for disk removal process' [patent_app_type] => utility [patent_app_number] => 12/179488 [patent_app_country] => US [patent_app_date] => 2008-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6308 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12179488 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/179488
Disk spacer drop-proofing tool for disk removal process Jul 23, 2008 Issued
Array ( [id] => 8172746 [patent_doc_number] => 08176625 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-15 [patent_title] => 'Electrical connector assembly tool' [patent_app_type] => utility [patent_app_number] => 12/173300 [patent_app_country] => US [patent_app_date] => 2008-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5052 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/176/08176625.pdf [firstpage_image] =>[orig_patent_app_number] => 12173300 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/173300
Electrical connector assembly tool Jul 14, 2008 Issued
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