Search

Howard Weiss

Examiner (ID: 16064)

Most Active Art Unit
2814
Art Unit(s)
2814, 2508
Total Applications
950
Issued Applications
632
Pending Applications
10
Abandoned Applications
309

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5750947 [patent_doc_number] => 20060220096 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-05 [patent_title] => 'Tunneling-enhanced floating gate semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/133718 [patent_app_country] => US [patent_app_date] => 2005-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5765 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0220/20060220096.pdf [firstpage_image] =>[orig_patent_app_number] => 11133718 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/133718
Tunneling-enhanced floating gate semiconductor device May 18, 2005 Abandoned
Array ( [id] => 6949794 [patent_doc_number] => 20050224888 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-13 [patent_title] => 'Integrated circuit array' [patent_app_type] => utility [patent_app_number] => 11/116139 [patent_app_country] => US [patent_app_date] => 2005-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6586 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20050224888.pdf [firstpage_image] =>[orig_patent_app_number] => 11116139 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/116139
Integrated circuit array Apr 26, 2005 Abandoned
Array ( [id] => 7176557 [patent_doc_number] => 20050189586 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-01 [patent_title] => 'DMOS device with a programmable threshold voltage' [patent_app_type] => utility [patent_app_number] => 11/104088 [patent_app_country] => US [patent_app_date] => 2005-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 10415 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20050189586.pdf [firstpage_image] =>[orig_patent_app_number] => 11104088 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/104088
DMOS device with a programmable threshold voltage Apr 11, 2005 Issued
Array ( [id] => 5854534 [patent_doc_number] => 20060226467 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-12 [patent_title] => 'P-channel charge trapping memory device with sub-gate' [patent_app_type] => utility [patent_app_number] => 11/100518 [patent_app_country] => US [patent_app_date] => 2005-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 5009 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0226/20060226467.pdf [firstpage_image] =>[orig_patent_app_number] => 11100518 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/100518
P-channel charge trapping memory device with sub-gate Apr 6, 2005 Abandoned
Array ( [id] => 5878064 [patent_doc_number] => 20060027870 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-09 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/100559 [patent_app_country] => US [patent_app_date] => 2005-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3636 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20060027870.pdf [firstpage_image] =>[orig_patent_app_number] => 11100559 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/100559
Semiconductor device and method of manufacturing the same Apr 6, 2005 Abandoned
Array ( [id] => 5697526 [patent_doc_number] => 20060214210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-28 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/097288 [patent_app_country] => US [patent_app_date] => 2005-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3292 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20060214210.pdf [firstpage_image] =>[orig_patent_app_number] => 11097288 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/097288
Semiconductor device Apr 3, 2005 Abandoned
Array ( [id] => 6949744 [patent_doc_number] => 20050224838 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-13 [patent_title] => 'Semiconductor device with heterojunction' [patent_app_type] => utility [patent_app_number] => 11/095528 [patent_app_country] => US [patent_app_date] => 2005-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6044 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0224/20050224838.pdf [firstpage_image] =>[orig_patent_app_number] => 11095528 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/095528
Semiconductor device with heterojunction Mar 31, 2005 Abandoned
Array ( [id] => 5750931 [patent_doc_number] => 20060220080 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-05 [patent_title] => 'Polymer memory and method of its fabrication' [patent_app_type] => utility [patent_app_number] => 11/096389 [patent_app_country] => US [patent_app_date] => 2005-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4222 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0220/20060220080.pdf [firstpage_image] =>[orig_patent_app_number] => 11096389 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/096389
Polymer memory with adhesion layer containing an immobilized metal Mar 30, 2005 Issued
Array ( [id] => 833437 [patent_doc_number] => 07396726 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-08 [patent_title] => 'Methods of fabricating surrounded-channel transistors with directionally etched gate or insulator formation regions' [patent_app_type] => utility [patent_app_number] => 11/095969 [patent_app_country] => US [patent_app_date] => 2005-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 96 [patent_no_of_words] => 7983 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/396/07396726.pdf [firstpage_image] =>[orig_patent_app_number] => 11095969 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/095969
Methods of fabricating surrounded-channel transistors with directionally etched gate or insulator formation regions Mar 30, 2005 Issued
Array ( [id] => 5854556 [patent_doc_number] => 20060226489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-12 [patent_title] => 'System and methods for retention-enhanced programmable shared gate logic circuit' [patent_app_type] => utility [patent_app_number] => 11/095938 [patent_app_country] => US [patent_app_date] => 2005-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4197 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0226/20060226489.pdf [firstpage_image] =>[orig_patent_app_number] => 11095938 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/095938
System and methods for retention-enhanced programmable shared gate logic circuit Mar 29, 2005 Abandoned
Array ( [id] => 7213987 [patent_doc_number] => 20050253183 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-17 [patent_title] => 'Non-volatile semiconductor memory device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/091408 [patent_app_country] => US [patent_app_date] => 2005-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 8764 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0253/20050253183.pdf [firstpage_image] =>[orig_patent_app_number] => 11091408 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/091408
Non-volatile semiconductor memory device and method of fabricating the same Mar 28, 2005 Abandoned
Array ( [id] => 4543011 [patent_doc_number] => 07875933 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-25 [patent_title] => 'Lateral bipolar transistor with additional ESD implant' [patent_app_type] => utility [patent_app_number] => 11/092368 [patent_app_country] => US [patent_app_date] => 2005-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 18 [patent_no_of_words] => 4756 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/875/07875933.pdf [firstpage_image] =>[orig_patent_app_number] => 11092368 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/092368
Lateral bipolar transistor with additional ESD implant Mar 28, 2005 Issued
Array ( [id] => 7016453 [patent_doc_number] => 20050218470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-06 [patent_title] => 'Integrated circuit device' [patent_app_type] => utility [patent_app_number] => 11/087587 [patent_app_country] => US [patent_app_date] => 2005-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6218 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20050218470.pdf [firstpage_image] =>[orig_patent_app_number] => 11087587 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/087587
Integrated circuit device with temperature monitor members Mar 23, 2005 Issued
Array ( [id] => 5697549 [patent_doc_number] => 20060214233 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-28 [patent_title] => 'FinFET semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/086608 [patent_app_country] => US [patent_app_date] => 2005-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4029 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20060214233.pdf [firstpage_image] =>[orig_patent_app_number] => 11086608 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/086608
FinFET semiconductor device Mar 21, 2005 Abandoned
Array ( [id] => 267428 [patent_doc_number] => 07566954 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-07-28 [patent_title] => 'Bonding configurations for lead-frame-based and substrate-based semiconductor packages' [patent_app_type] => utility [patent_app_number] => 11/084529 [patent_app_country] => US [patent_app_date] => 2005-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 26 [patent_no_of_words] => 13842 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/566/07566954.pdf [firstpage_image] =>[orig_patent_app_number] => 11084529 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/084529
Bonding configurations for lead-frame-based and substrate-based semiconductor packages Mar 17, 2005 Issued
Array ( [id] => 337961 [patent_doc_number] => 07504302 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-17 [patent_title] => 'Process of forming a non-volatile memory cell including a capacitor structure' [patent_app_type] => utility [patent_app_number] => 11/083878 [patent_app_country] => US [patent_app_date] => 2005-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 8495 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/504/07504302.pdf [firstpage_image] =>[orig_patent_app_number] => 11083878 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/083878
Process of forming a non-volatile memory cell including a capacitor structure Mar 17, 2005 Issued
Array ( [id] => 6963932 [patent_doc_number] => 20050230829 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-20 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/081658 [patent_app_country] => US [patent_app_date] => 2005-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9010 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0230/20050230829.pdf [firstpage_image] =>[orig_patent_app_number] => 11081658 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/081658
Semiconductor device Mar 16, 2005 Abandoned
Array ( [id] => 6975478 [patent_doc_number] => 20050285193 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-29 [patent_title] => 'Semiconductor device and method of manufacturing same' [patent_app_type] => utility [patent_app_number] => 11/081538 [patent_app_country] => US [patent_app_date] => 2005-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 3666 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0285/20050285193.pdf [firstpage_image] =>[orig_patent_app_number] => 11081538 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/081538
Semiconductor device and method of manufacturing same Mar 16, 2005 Abandoned
Array ( [id] => 6975479 [patent_doc_number] => 20050285194 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-29 [patent_title] => 'Semiconductor-on-insulating (SOI) field effect transistors with body contacts and methods of forming same' [patent_app_type] => utility [patent_app_number] => 11/082069 [patent_app_country] => US [patent_app_date] => 2005-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6616 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0285/20050285194.pdf [firstpage_image] =>[orig_patent_app_number] => 11082069 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/082069
Semiconductor-on-insulating (SOI) field effect transistors with body contacts and methods of forming same Mar 15, 2005 Abandoned
Array ( [id] => 7108427 [patent_doc_number] => 20050205880 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-22 [patent_title] => 'Display device and electronic appliance' [patent_app_type] => utility [patent_app_number] => 11/079598 [patent_app_country] => US [patent_app_date] => 2005-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 21767 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0205/20050205880.pdf [firstpage_image] =>[orig_patent_app_number] => 11079598 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/079598
Display device and electronic appliance Mar 14, 2005 Abandoned
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