Search

Howard Weiss

Examiner (ID: 5974)

Most Active Art Unit
2814
Art Unit(s)
2508, 2814
Total Applications
950
Issued Applications
632
Pending Applications
10
Abandoned Applications
309

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6858968 [patent_doc_number] => 20030089976 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-15 [patent_title] => 'Heat sink with collapse structure and semiconductor package with heat sink' [patent_app_type] => new [patent_app_number] => 10/329093 [patent_app_country] => US [patent_app_date] => 2002-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2324 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0089/20030089976.pdf [firstpage_image] =>[orig_patent_app_number] => 10329093 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/329093
Heat sink with collapse structure for semiconductor package Dec 22, 2002 Issued
Array ( [id] => 1140820 [patent_doc_number] => 06781176 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-24 [patent_title] => 'Conductively doped strontium titanate barrier intermediate a silicon underlayer and an epitaxial metal oxide film' [patent_app_type] => B2 [patent_app_number] => 10/328541 [patent_app_country] => US [patent_app_date] => 2002-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 5522 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/781/06781176.pdf [firstpage_image] =>[orig_patent_app_number] => 10328541 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/328541
Conductively doped strontium titanate barrier intermediate a silicon underlayer and an epitaxial metal oxide film Dec 22, 2002 Issued
Array ( [id] => 1053185 [patent_doc_number] => 06858513 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-22 [patent_title] => 'Method for manufacturing a semiconductor device with MIS capacitors with dielectric film in common' [patent_app_type] => utility [patent_app_number] => 10/327834 [patent_app_country] => US [patent_app_date] => 2002-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 6702 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/858/06858513.pdf [firstpage_image] =>[orig_patent_app_number] => 10327834 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/327834
Method for manufacturing a semiconductor device with MIS capacitors with dielectric film in common Dec 22, 2002 Issued
Array ( [id] => 687781 [patent_doc_number] => 07078773 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-18 [patent_title] => 'Nitride-encapsulated FET (NNCFET)' [patent_app_type] => utility [patent_app_number] => 10/328258 [patent_app_country] => US [patent_app_date] => 2002-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 5699 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/078/07078773.pdf [firstpage_image] =>[orig_patent_app_number] => 10328258 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/328258
Nitride-encapsulated FET (NNCFET) Dec 22, 2002 Issued
Array ( [id] => 7457211 [patent_doc_number] => 20040119163 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-24 [patent_title] => 'Method of making semiconductor devices using carbon nitride, a low-dielectric-constant hard mask and/or etch stop' [patent_app_type] => new [patent_app_number] => 10/328806 [patent_app_country] => US [patent_app_date] => 2002-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2410 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0119/20040119163.pdf [firstpage_image] =>[orig_patent_app_number] => 10328806 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/328806
Method of making semiconductor devices using carbon nitride, a low-dielectric-constant hard mask and/or etch stop Dec 22, 2002 Abandoned
Array ( [id] => 938425 [patent_doc_number] => 06972254 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-12-06 [patent_title] => 'Manufacturing a conformal atomic liner layer in an integrated circuit interconnect' [patent_app_type] => utility [patent_app_number] => 10/327428 [patent_app_country] => US [patent_app_date] => 2002-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3709 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/972/06972254.pdf [firstpage_image] =>[orig_patent_app_number] => 10327428 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/327428
Manufacturing a conformal atomic liner layer in an integrated circuit interconnect Dec 19, 2002 Issued
Array ( [id] => 6680939 [patent_doc_number] => 20030116803 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-26 [patent_title] => 'Cylinder type transistor with vertical silicon-on-insulator structure and fabrication method thereof' [patent_app_type] => new [patent_app_number] => 10/325288 [patent_app_country] => US [patent_app_date] => 2002-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2296 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0116/20030116803.pdf [firstpage_image] =>[orig_patent_app_number] => 10325288 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/325288
Cylinder type transistor with vertical silicon-on-insulator structure and fabrication method thereof Dec 18, 2002 Abandoned
Array ( [id] => 6849395 [patent_doc_number] => 20030141597 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-31 [patent_title] => 'Semiconductor apparatus having contacts of multiple heights and method of making same' [patent_app_type] => new [patent_app_number] => 10/324244 [patent_app_country] => US [patent_app_date] => 2002-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4204 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0141/20030141597.pdf [firstpage_image] =>[orig_patent_app_number] => 10324244 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/324244
Semiconductor apparatus having contacts of multiple heights and method of making same Dec 18, 2002 Abandoned
Array ( [id] => 7301286 [patent_doc_number] => 20040113263 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-17 [patent_title] => 'Semiconductor package structure provided with heat sink fan' [patent_app_type] => new [patent_app_number] => 10/320448 [patent_app_country] => US [patent_app_date] => 2002-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1629 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20040113263.pdf [firstpage_image] =>[orig_patent_app_number] => 10320448 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/320448
Semiconductor package structure provided with heat sink fan Dec 16, 2002 Abandoned
Array ( [id] => 7301285 [patent_doc_number] => 20040113262 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-17 [patent_title] => 'Miniature moldlocks for heatsink or flag for an overmolded plastic package' [patent_app_type] => new [patent_app_number] => 10/318699 [patent_app_country] => US [patent_app_date] => 2002-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4709 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0113/20040113262.pdf [firstpage_image] =>[orig_patent_app_number] => 10318699 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/318699
Miniature moldlocks for heatsink or flag for an overmolded plastic package Dec 12, 2002 Issued
Array ( [id] => 1025548 [patent_doc_number] => 06885082 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-26 [patent_title] => 'Semiconductor device with built in zener diode and resistor' [patent_app_type] => utility [patent_app_number] => 10/318160 [patent_app_country] => US [patent_app_date] => 2002-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 4637 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/885/06885082.pdf [firstpage_image] =>[orig_patent_app_number] => 10318160 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/318160
Semiconductor device with built in zener diode and resistor Dec 12, 2002 Issued
Array ( [id] => 6666748 [patent_doc_number] => 20030111731 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-19 [patent_title] => 'Semiconductor device and method for producing the same' [patent_app_type] => new [patent_app_number] => 10/318199 [patent_app_country] => US [patent_app_date] => 2002-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6648 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0111/20030111731.pdf [firstpage_image] =>[orig_patent_app_number] => 10318199 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/318199
Semiconductor device having a roughened surface Dec 12, 2002 Issued
Array ( [id] => 7008381 [patent_doc_number] => 20050062097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-24 [patent_title] => 'Method and system for molecular charge storage field effect transistor' [patent_app_type] => utility [patent_app_number] => 10/498743 [patent_app_country] => US [patent_app_date] => 2002-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 15907 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20050062097.pdf [firstpage_image] =>[orig_patent_app_number] => 10498743 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/498743
Method and system for molecular charge storage field effect transistor Dec 11, 2002 Abandoned
Array ( [id] => 6820038 [patent_doc_number] => 20030218199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-27 [patent_title] => 'Open bit line DRAM with ultra-thin body transistors' [patent_app_type] => new [patent_app_number] => 10/316479 [patent_app_country] => US [patent_app_date] => 2002-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 10492 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20030218199.pdf [firstpage_image] =>[orig_patent_app_number] => 10316479 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/316479
Method of forming a memory having a vertical transistor Dec 10, 2002 Issued
Array ( [id] => 5652696 [patent_doc_number] => 20060138431 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-29 [patent_title] => 'Light emitting device structure having nitride bulk single crystal layer' [patent_app_type] => utility [patent_app_number] => 10/514638 [patent_app_country] => US [patent_app_date] => 2002-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8713 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0138/20060138431.pdf [firstpage_image] =>[orig_patent_app_number] => 10514638 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/514638
Light emitting device structure having nitride bulk single crystal layer Dec 10, 2002 Abandoned
Array ( [id] => 1053712 [patent_doc_number] => 06858893 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-22 [patent_title] => 'Semiconductor memory having a pillar type trench dram cell' [patent_app_type] => utility [patent_app_number] => 10/316148 [patent_app_country] => US [patent_app_date] => 2002-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 5442 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 363 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/858/06858893.pdf [firstpage_image] =>[orig_patent_app_number] => 10316148 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/316148
Semiconductor memory having a pillar type trench dram cell Dec 9, 2002 Issued
Array ( [id] => 1158715 [patent_doc_number] => 06765292 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-20 [patent_title] => 'Contact structure for semiconductor device' [patent_app_type] => B2 [patent_app_number] => 10/316249 [patent_app_country] => US [patent_app_date] => 2002-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 1101 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/765/06765292.pdf [firstpage_image] =>[orig_patent_app_number] => 10316249 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/316249
Contact structure for semiconductor device Dec 9, 2002 Issued
Array ( [id] => 6718670 [patent_doc_number] => 20030052357 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-20 [patent_title] => 'Interlayer oxide containing thin films for high dielectric constant application' [patent_app_type] => new [patent_app_number] => 10/278581 [patent_app_country] => US [patent_app_date] => 2002-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 16894 [patent_no_of_claims] => 193 [patent_no_of_ind_claims] => 22 [patent_words_short_claim] => 19 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20030052357.pdf [firstpage_image] =>[orig_patent_app_number] => 10278581 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/278581
Interlayer oxide containing thin films for high dielectric constant application of the formula AB2O6 or AB2O7 Oct 22, 2002 Issued
Array ( [id] => 6646822 [patent_doc_number] => 20030075746 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-24 [patent_title] => 'Semiconductor device for determining identification code and application thereof' [patent_app_type] => new [patent_app_number] => 10/274130 [patent_app_country] => US [patent_app_date] => 2002-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 14016 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0075/20030075746.pdf [firstpage_image] =>[orig_patent_app_number] => 10274130 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/274130
Semiconductor device for determining identification code and application thereof Oct 20, 2002 Abandoned
Array ( [id] => 7434152 [patent_doc_number] => 20040065960 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-08 [patent_title] => 'Electronic package with filled blinds vias' [patent_app_type] => new [patent_app_number] => 10/263909 [patent_app_country] => US [patent_app_date] => 2002-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3603 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0065/20040065960.pdf [firstpage_image] =>[orig_patent_app_number] => 10263909 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/263909
Electronic package with filled blinds vias Oct 2, 2002 Issued
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