Search

Howard Weiss

Examiner (ID: 16064)

Most Active Art Unit
2814
Art Unit(s)
2814, 2508
Total Applications
950
Issued Applications
632
Pending Applications
10
Abandoned Applications
309

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8828068 [patent_doc_number] => 20130129113 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-23 [patent_title] => 'SOUND SOURCE SIGNAL FILTERING APPARATUS BASED ON CALCULATED DISTANCE BETWEEN MICROPHONE AND SOUND SOURCE' [patent_app_type] => utility [patent_app_number] => 13/747065 [patent_app_country] => US [patent_app_date] => 2013-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7245 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13747065 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/747065
Sound source signal filtering apparatus based on calculated distance between microphone and sound source Jan 21, 2013 Issued
Array ( [id] => 9153529 [patent_doc_number] => 08586435 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-19 [patent_title] => 'Fabrication of MOSFET device with reduced breakdown voltage' [patent_app_type] => utility [patent_app_number] => 13/722963 [patent_app_country] => US [patent_app_date] => 2012-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 31 [patent_no_of_words] => 4933 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13722963 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/722963
Fabrication of MOSFET device with reduced breakdown voltage Dec 19, 2012 Issued
Array ( [id] => 8582968 [patent_doc_number] => 20130001789 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-03 [patent_title] => 'INTERCONNECT STRUCTURE WITH IMPROVED DIELECTRIC LINE TO VIA ELECTROMIGRATION RESISTANT INTERFACIAL LAYER AND METHOD OF FABRICATING SAME' [patent_app_type] => utility [patent_app_number] => 13/617060 [patent_app_country] => US [patent_app_date] => 2012-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6749 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13617060 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/617060
INTERCONNECT STRUCTURE WITH IMPROVED DIELECTRIC LINE TO VIA ELECTROMIGRATION RESISTANT INTERFACIAL LAYER AND METHOD OF FABRICATING SAME Sep 13, 2012 Abandoned
Array ( [id] => 8582960 [patent_doc_number] => 20130001781 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-03 [patent_title] => 'STRUCTURES AND METHODS FOR PHOTO-PATTERNABLE LOW-k (PPLK) INTEGRATION' [patent_app_type] => utility [patent_app_number] => 13/602126 [patent_app_country] => US [patent_app_date] => 2012-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 13648 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13602126 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/602126
Interconnect structures containing a photo-patternable low-k dielectric with a curved sidewall surface Aug 31, 2012 Issued
Array ( [id] => 8502631 [patent_doc_number] => 20120302039 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-29 [patent_title] => 'ISOLATION STRUCTURES FOR SOI DEVICES WITH ULTRATHIN SOI AND ULTRATHIN BOX' [patent_app_type] => utility [patent_app_number] => 13/566568 [patent_app_country] => US [patent_app_date] => 2012-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 8626 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13566568 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/566568
Method of forming isolation structures for SOI devices with ultrathin SOI and ultrathin box Aug 2, 2012 Issued
Array ( [id] => 8486964 [patent_doc_number] => 20120286371 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-15 [patent_title] => 'Field Effect Transistor Device With Self-Aligned Junction' [patent_app_type] => utility [patent_app_number] => 13/558664 [patent_app_country] => US [patent_app_date] => 2012-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2980 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13558664 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/558664
Field Effect Transistor Device With Self-Aligned Junction Jul 25, 2012 Abandoned
Array ( [id] => 8493293 [patent_doc_number] => 20120292701 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-22 [patent_title] => 'Silicon on Insulator Field Effect Device' [patent_app_type] => utility [patent_app_number] => 13/557370 [patent_app_country] => US [patent_app_date] => 2012-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2186 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13557370 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/557370
Silicon on Insulator Field Effect Device Jul 24, 2012 Abandoned
Array ( [id] => 8486953 [patent_doc_number] => 20120286360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-15 [patent_title] => 'Field Effect Transistor Device with Self-Aligned Junction and Spacer' [patent_app_type] => utility [patent_app_number] => 13/556608 [patent_app_country] => US [patent_app_date] => 2012-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2086 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13556608 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/556608
Field Effect Transistor Device with Self-Aligned Junction and Spacer Jul 23, 2012 Abandoned
Array ( [id] => 8922865 [patent_doc_number] => 08488808 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-16 [patent_title] => 'Method of powering down an audio amplifier with timing circuit to power down bias control and amplifying circuits in sequence' [patent_app_type] => utility [patent_app_number] => 13/552368 [patent_app_country] => US [patent_app_date] => 2012-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2073 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13552368 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/552368
Method of powering down an audio amplifier with timing circuit to power down bias control and amplifying circuits in sequence Jul 17, 2012 Issued
Array ( [id] => 8480798 [patent_doc_number] => 20120280205 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-08 [patent_title] => 'Contacts for Nanowire Field Effect Transistors' [patent_app_type] => utility [patent_app_number] => 13/551995 [patent_app_country] => US [patent_app_date] => 2012-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2035 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13551995 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/551995
Contacts for nanowire field effect transistors Jul 17, 2012 Issued
Array ( [id] => 8483335 [patent_doc_number] => 20120282742 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-08 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/551038 [patent_app_country] => US [patent_app_date] => 2012-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7092 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13551038 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/551038
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME Jul 16, 2012 Abandoned
Array ( [id] => 9427496 [patent_doc_number] => 08703571 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-22 [patent_title] => 'Methods of fabricating bipolar junction transistors having a fin' [patent_app_type] => utility [patent_app_number] => 13/535090 [patent_app_country] => US [patent_app_date] => 2012-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 22 [patent_no_of_words] => 5373 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13535090 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/535090
Methods of fabricating bipolar junction transistors having a fin Jun 26, 2012 Issued
Array ( [id] => 8675373 [patent_doc_number] => 08383486 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-26 [patent_title] => 'Method of manufacturing a semiconductor device including a stress film' [patent_app_type] => utility [patent_app_number] => 13/486877 [patent_app_country] => US [patent_app_date] => 2012-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 27 [patent_no_of_words] => 10113 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13486877 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/486877
Method of manufacturing a semiconductor device including a stress film May 31, 2012 Issued
Array ( [id] => 9923489 [patent_doc_number] => 08981457 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-17 [patent_title] => 'Dense arrays and charge storage devices' [patent_app_type] => utility [patent_app_number] => 13/468731 [patent_app_country] => US [patent_app_date] => 2012-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 85 [patent_figures_cnt] => 169 [patent_no_of_words] => 44371 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 367 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13468731 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/468731
Dense arrays and charge storage devices May 9, 2012 Issued
Array ( [id] => 9883191 [patent_doc_number] => 08969958 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-03-03 [patent_title] => 'Integrated MOS power transistor with body extension region for poly field plate depletion assist' [patent_app_type] => utility [patent_app_number] => 13/460603 [patent_app_country] => US [patent_app_date] => 2012-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 12755 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 360 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13460603 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/460603
Integrated MOS power transistor with body extension region for poly field plate depletion assist Apr 29, 2012 Issued
Array ( [id] => 9875969 [patent_doc_number] => 08963241 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-02-24 [patent_title] => 'Integrated MOS power transistor with poly field plate extension for depletion assist' [patent_app_type] => utility [patent_app_number] => 13/460717 [patent_app_country] => US [patent_app_date] => 2012-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 13309 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 308 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13460717 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/460717
Integrated MOS power transistor with poly field plate extension for depletion assist Apr 29, 2012 Issued
Array ( [id] => 9844932 [patent_doc_number] => 08946851 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-02-03 [patent_title] => 'Integrated MOS power transistor with thin gate oxide and low gate charge' [patent_app_type] => utility [patent_app_number] => 13/446987 [patent_app_country] => US [patent_app_date] => 2012-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 9987 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13446987 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/446987
Integrated MOS power transistor with thin gate oxide and low gate charge Apr 12, 2012 Issued
Array ( [id] => 8321189 [patent_doc_number] => 20120193602 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-02 [patent_title] => 'NANOSCOPIC WIRE-BASED DEVICES AND ARRAYS' [patent_app_type] => utility [patent_app_number] => 13/444334 [patent_app_country] => US [patent_app_date] => 2012-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 10927 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13444334 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/444334
Nanoscopic wire-based devices and arrays Apr 10, 2012 Issued
Array ( [id] => 8392863 [patent_doc_number] => 20120230699 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-13 [patent_title] => 'LIGHT-BASED DETECTION FOR ACOUSTIC APPLICATIONS' [patent_app_type] => utility [patent_app_number] => 13/420568 [patent_app_country] => US [patent_app_date] => 2012-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 14296 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13420568 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/420568
Light-based detection for acoustic applications Mar 13, 2012 Issued
Array ( [id] => 8248970 [patent_doc_number] => 20120153290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-21 [patent_title] => 'FLAT DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/406072 [patent_app_country] => US [patent_app_date] => 2012-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6077 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20120153290.pdf [firstpage_image] =>[orig_patent_app_number] => 13406072 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/406072
Flat display device with a dummy pixel integrally formed in a peripheral region Feb 26, 2012 Issued
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