Search

Howard Weiss

Examiner (ID: 16064)

Most Active Art Unit
2814
Art Unit(s)
2814, 2508
Total Applications
950
Issued Applications
632
Pending Applications
10
Abandoned Applications
309

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9099465 [patent_doc_number] => 08563338 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-22 [patent_title] => 'Light emitting diode package having an LED chip mounted on a phosphor substrate' [patent_app_type] => utility [patent_app_number] => 13/369157 [patent_app_country] => US [patent_app_date] => 2012-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 2164 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13369157 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/369157
Light emitting diode package having an LED chip mounted on a phosphor substrate Feb 7, 2012 Issued
Array ( [id] => 9594623 [patent_doc_number] => 20140191300 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-10 [patent_title] => 'HARD MASK ETCH STOP FOR TALL FINS' [patent_app_type] => utility [patent_app_number] => 13/997161 [patent_app_country] => US [patent_app_date] => 2011-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5928 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13997161 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/997161
Method of forming a semiconductor device with tall fins and using hard mask etch stops Dec 30, 2011 Issued
Array ( [id] => 9639427 [patent_doc_number] => 20140217537 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-07 [patent_title] => 'RE-ENTRANT MIRROR PHOTODETECTOR WITH WAVEGUIDE MODE FOCUSING' [patent_app_type] => utility [patent_app_number] => 13/996528 [patent_app_country] => US [patent_app_date] => 2011-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7098 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13996528 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/996528
Re-entrant mirror photodetector with waveguide mode focusing Dec 27, 2011 Issued
Array ( [id] => 8090401 [patent_doc_number] => 20120080798 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-04-05 [patent_title] => 'MEMORY DEVICES HAVING CONTACT FEATURES' [patent_app_type] => utility [patent_app_number] => 13/323120 [patent_app_country] => US [patent_app_date] => 2011-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10035 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20120080798.pdf [firstpage_image] =>[orig_patent_app_number] => 13323120 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/323120
Contact structure in a memory device Dec 11, 2011 Issued
Array ( [id] => 9113653 [patent_doc_number] => 08569832 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-29 [patent_title] => 'Vertical transistor having first and second tensile layers' [patent_app_type] => utility [patent_app_number] => 13/314532 [patent_app_country] => US [patent_app_date] => 2011-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 3313 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13314532 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/314532
Vertical transistor having first and second tensile layers Dec 7, 2011 Issued
Array ( [id] => 9938006 [patent_doc_number] => 08987818 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-03-24 [patent_title] => 'Integrated MOS power transistor with thin gate oxide and low gate charge' [patent_app_type] => utility [patent_app_number] => 13/312827 [patent_app_country] => US [patent_app_date] => 2011-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 7899 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 279 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13312827 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/312827
Integrated MOS power transistor with thin gate oxide and low gate charge Dec 5, 2011 Issued
Array ( [id] => 9883183 [patent_doc_number] => 08969950 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-03 [patent_title] => 'Integrated MOSFET-Schottky diode device with reduced source and body Kelvin contact impedance and breakdown voltage' [patent_app_type] => utility [patent_app_number] => 13/306067 [patent_app_country] => US [patent_app_date] => 2011-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 30 [patent_no_of_words] => 5559 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 430 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13306067 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/306067
Integrated MOSFET-Schottky diode device with reduced source and body Kelvin contact impedance and breakdown voltage Nov 28, 2011 Issued
Array ( [id] => 8615767 [patent_doc_number] => 20130021079 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-24 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT AND SIGNAL TRANSMISSION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/270437 [patent_app_country] => US [patent_app_date] => 2011-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5423 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13270437 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/270437
Semiconductor integrated circuit having multilayer structure Oct 10, 2011 Issued
Array ( [id] => 8743029 [patent_doc_number] => 20130082746 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-04 [patent_title] => 'VERTICAL TRANSISTOR HAVING REDUCED PARASITIC CAPACITANCE' [patent_app_type] => utility [patent_app_number] => 13/248488 [patent_app_country] => US [patent_app_date] => 2011-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7216 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13248488 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/248488
Vertical transistor having reduced parasitic capacitance Sep 28, 2011 Issued
Array ( [id] => 8808355 [patent_doc_number] => 08446011 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-21 [patent_title] => 'Devices and memory arrays including bit lines and bit line contacts' [patent_app_type] => utility [patent_app_number] => 13/243510 [patent_app_country] => US [patent_app_date] => 2011-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 60 [patent_no_of_words] => 5594 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13243510 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/243510
Devices and memory arrays including bit lines and bit line contacts Sep 22, 2011 Issued
Array ( [id] => 7564805 [patent_doc_number] => 20110284868 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-24 [patent_title] => 'High Voltage III-Nitride Transistor' [patent_app_type] => utility [patent_app_number] => 13/197514 [patent_app_country] => US [patent_app_date] => 2011-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3034 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0284/20110284868.pdf [firstpage_image] =>[orig_patent_app_number] => 13197514 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/197514
High voltage III-nitride transistor Aug 2, 2011 Issued
Array ( [id] => 7564803 [patent_doc_number] => 20110284866 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-24 [patent_title] => 'LIGHT-EMITTING DIODE (LED) STRUCTURE HAVING A WAVELENGTH-CONVERTING LAYER AND METHOD OF PRODUCING' [patent_app_type] => utility [patent_app_number] => 13/191235 [patent_app_country] => US [patent_app_date] => 2011-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4913 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0284/20110284866.pdf [firstpage_image] =>[orig_patent_app_number] => 13191235 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/191235
LIGHT-EMITTING DIODE (LED) STRUCTURE HAVING A WAVELENGTH-CONVERTING LAYER AND METHOD OF PRODUCING Jul 25, 2011 Abandoned
Array ( [id] => 8835633 [patent_doc_number] => 08451397 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-28 [patent_title] => 'Thin film transistor substrate' [patent_app_type] => utility [patent_app_number] => 13/184816 [patent_app_country] => US [patent_app_date] => 2011-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3351 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13184816 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/184816
Thin film transistor substrate Jul 17, 2011 Issued
Array ( [id] => 9713590 [patent_doc_number] => 08838184 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-16 [patent_title] => 'Wireless conference call telephone' [patent_app_type] => utility [patent_app_number] => 13/184422 [patent_app_country] => US [patent_app_date] => 2011-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 41 [patent_no_of_words] => 39558 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13184422 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/184422
Wireless conference call telephone Jul 14, 2011 Issued
Array ( [id] => 7570952 [patent_doc_number] => 20110266608 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-03 [patent_title] => 'NONVOLATILE MEMORY DEVICES HAVING GATE STRUCTURES DOPED BY NITROGEN' [patent_app_type] => utility [patent_app_number] => 13/181134 [patent_app_country] => US [patent_app_date] => 2011-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 9924 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0266/20110266608.pdf [firstpage_image] =>[orig_patent_app_number] => 13181134 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/181134
Nonvolatile memory devices having gate structures doped by nitrogen Jul 11, 2011 Issued
Array ( [id] => 10604103 [patent_doc_number] => 09324673 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-26 [patent_title] => 'Integrated circuit packaging system with wafer level reconfiguration and method of manufacture thereof' [patent_app_type] => utility [patent_app_number] => 13/167649 [patent_app_country] => US [patent_app_date] => 2011-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 9617 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13167649 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/167649
Integrated circuit packaging system with wafer level reconfiguration and method of manufacture thereof Jun 22, 2011 Issued
Array ( [id] => 10150356 [patent_doc_number] => 09182641 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-10 [patent_title] => 'Signal line structure of a flat display' [patent_app_type] => utility [patent_app_number] => 13/166826 [patent_app_country] => US [patent_app_date] => 2011-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2646 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 394 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13166826 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/166826
Signal line structure of a flat display Jun 22, 2011 Issued
Array ( [id] => 7717220 [patent_doc_number] => 20120007255 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-12 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/166426 [patent_app_country] => US [patent_app_date] => 2011-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 9913 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20120007255.pdf [firstpage_image] =>[orig_patent_app_number] => 13166426 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/166426
SEMICONDUCTOR DEVICE Jun 21, 2011 Abandoned
Array ( [id] => 10053479 [patent_doc_number] => 09093364 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-28 [patent_title] => 'Integrated circuit packaging system with exposed vertical interconnects and method of manufacture thereof' [patent_app_type] => utility [patent_app_number] => 13/166438 [patent_app_country] => US [patent_app_date] => 2011-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 8025 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13166438 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/166438
Integrated circuit packaging system with exposed vertical interconnects and method of manufacture thereof Jun 21, 2011 Issued
Array ( [id] => 8193017 [patent_doc_number] => 20120119357 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'SEMICONDUCTOR APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/166118 [patent_app_country] => US [patent_app_date] => 2011-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5629 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0119/20120119357.pdf [firstpage_image] =>[orig_patent_app_number] => 13166118 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/166118
SEMICONDUCTOR APPARATUS Jun 21, 2011 Abandoned
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