
Howard Weiss
Examiner (ID: 16064)
| Most Active Art Unit | 2814 |
| Art Unit(s) | 2814, 2508 |
| Total Applications | 950 |
| Issued Applications | 632 |
| Pending Applications | 10 |
| Abandoned Applications | 309 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9099465
[patent_doc_number] => 08563338
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-10-22
[patent_title] => 'Light emitting diode package having an LED chip mounted on a phosphor substrate'
[patent_app_type] => utility
[patent_app_number] => 13/369157
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Array
(
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[patent_issue_date] => 2014-07-10
[patent_title] => 'HARD MASK ETCH STOP FOR TALL FINS'
[patent_app_type] => utility
[patent_app_number] => 13/997161
[patent_app_country] => US
[patent_app_date] => 2011-12-31
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/997161 | Method of forming a semiconductor device with tall fins and using hard mask etch stops | Dec 30, 2011 | Issued |
Array
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[patent_issue_date] => 2014-08-07
[patent_title] => 'RE-ENTRANT MIRROR PHOTODETECTOR WITH WAVEGUIDE MODE FOCUSING'
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[patent_app_date] => 2011-12-28
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/996528 | Re-entrant mirror photodetector with waveguide mode focusing | Dec 27, 2011 | Issued |
Array
(
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[patent_doc_number] => 20120080798
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[patent_issue_date] => 2012-04-05
[patent_title] => 'MEMORY DEVICES HAVING CONTACT FEATURES'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/323120 | Contact structure in a memory device | Dec 11, 2011 | Issued |
Array
(
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[patent_title] => 'Vertical transistor having first and second tensile layers'
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Array
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[patent_title] => 'Integrated MOS power transistor with thin gate oxide and low gate charge'
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Array
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[patent_title] => 'Integrated MOSFET-Schottky diode device with reduced source and body Kelvin contact impedance and breakdown voltage'
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Array
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[id] => 8615767
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[patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT AND SIGNAL TRANSMISSION METHOD THEREOF'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/270437 | Semiconductor integrated circuit having multilayer structure | Oct 10, 2011 | Issued |
Array
(
[id] => 8743029
[patent_doc_number] => 20130082746
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[patent_issue_date] => 2013-04-04
[patent_title] => 'VERTICAL TRANSISTOR HAVING REDUCED PARASITIC CAPACITANCE'
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Array
(
[id] => 8808355
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[patent_issue_date] => 2013-05-21
[patent_title] => 'Devices and memory arrays including bit lines and bit line contacts'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/243510 | Devices and memory arrays including bit lines and bit line contacts | Sep 22, 2011 | Issued |
Array
(
[id] => 7564805
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[patent_issue_date] => 2011-11-24
[patent_title] => 'High Voltage III-Nitride Transistor'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/197514 | High voltage III-nitride transistor | Aug 2, 2011 | Issued |
Array
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[patent_title] => 'LIGHT-EMITTING DIODE (LED) STRUCTURE HAVING A WAVELENGTH-CONVERTING LAYER AND METHOD OF PRODUCING'
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Array
(
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Array
(
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Array
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Array
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Array
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Array
(
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Array
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