Search

Howard Weiss

Examiner (ID: 16064)

Most Active Art Unit
2814
Art Unit(s)
2814, 2508
Total Applications
950
Issued Applications
632
Pending Applications
10
Abandoned Applications
309

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7666781 [patent_doc_number] => 20110316050 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-29 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING A HETEROJUNCTION BIOPOLAR TRANSISTOR AND A FIELD EFFECT TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 13/166127 [patent_app_country] => US [patent_app_date] => 2011-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 9385 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13166127 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/166127
SEMICONDUCTOR DEVICE HAVING A HETEROJUNCTION BIOPOLAR TRANSISTOR AND A FIELD EFFECT TRANSISTOR Jun 21, 2011 Abandoned
Array ( [id] => 7660217 [patent_doc_number] => 20110309486 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-22 [patent_title] => 'Method of Etching and Singulating a Cap Wafer' [patent_app_type] => utility [patent_app_number] => 13/165934 [patent_app_country] => US [patent_app_date] => 2011-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3277 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0309/20110309486.pdf [firstpage_image] =>[orig_patent_app_number] => 13165934 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/165934
Method of etching and singulating a cap wafer Jun 21, 2011 Issued
Array ( [id] => 8563599 [patent_doc_number] => 20120326170 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-27 [patent_title] => 'WAFER LEVEL MOLDED OPTO-COUPLERS' [patent_app_type] => utility [patent_app_number] => 13/166697 [patent_app_country] => US [patent_app_date] => 2011-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6401 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13166697 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/166697
WAFER LEVEL MOLDED OPTO-COUPLERS Jun 21, 2011 Abandoned
Array ( [id] => 8499779 [patent_doc_number] => 20120299187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-29 [patent_title] => 'Aluminum Bond Pad With Trench Thinning for Fine Pitch Ultra-Thick Aluminum Products' [patent_app_type] => utility [patent_app_number] => 13/166562 [patent_app_country] => US [patent_app_date] => 2011-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3943 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13166562 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/166562
Aluminum Bond Pad With Trench Thinning for Fine Pitch Ultra-Thick Aluminum Products Jun 21, 2011 Abandoned
Array ( [id] => 7666873 [patent_doc_number] => 20110316142 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-29 [patent_title] => 'SEMICONDUCTOR MODULE WITH RESIN-MOLDED PACKAGE OF HEAT SPREADER AND POWER SEMICONDUCTOR CHIP' [patent_app_type] => utility [patent_app_number] => 13/166101 [patent_app_country] => US [patent_app_date] => 2011-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6617 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13166101 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/166101
SEMICONDUCTOR MODULE WITH RESIN-MOLDED PACKAGE OF HEAT SPREADER AND POWER SEMICONDUCTOR CHIP Jun 21, 2011 Abandoned
Array ( [id] => 6108614 [patent_doc_number] => 20110188329 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-04 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/086377 [patent_app_country] => US [patent_app_date] => 2011-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9312 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0188/20110188329.pdf [firstpage_image] =>[orig_patent_app_number] => 13086377 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/086377
SEMICONDUCTOR INTEGRATED CIRCUIT Apr 12, 2011 Abandoned
Array ( [id] => 8071733 [patent_doc_number] => 20110241156 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-06 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/080582 [patent_app_country] => US [patent_app_date] => 2011-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3075 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0241/20110241156.pdf [firstpage_image] =>[orig_patent_app_number] => 13080582 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/080582
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME Apr 4, 2011 Abandoned
Array ( [id] => 9184295 [patent_doc_number] => 08624231 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-07 [patent_title] => 'Benzopyrene compound and organic light-emitting element containing the same' [patent_app_type] => utility [patent_app_number] => 13/076194 [patent_app_country] => US [patent_app_date] => 2011-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 8137 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 11 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13076194 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/076194
Benzopyrene compound and organic light-emitting element containing the same Mar 29, 2011 Issued
Array ( [id] => 8298951 [patent_doc_number] => 20120181499 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-19 [patent_title] => 'QUATERNARY GALLIUM TELLURIUM ANTIMONY (M-GaTeSb) BASED PHASE CHANGE MEMORY DEVICES' [patent_app_type] => utility [patent_app_number] => 13/046994 [patent_app_country] => US [patent_app_date] => 2011-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5182 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13046994 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/046994
QUATERNARY GALLIUM TELLURIUM ANTIMONY (M-GaTeSb) BASED PHASE CHANGE MEMORY DEVICES Mar 13, 2011 Abandoned
Array ( [id] => 10888107 [patent_doc_number] => 08912104 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-12-16 [patent_title] => 'Method for fabricating integrated circuits with patterned thermal adjustment layers for design optimization' [patent_app_type] => utility [patent_app_number] => 13/047664 [patent_app_country] => US [patent_app_date] => 2011-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 4929 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13047664 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/047664
Method for fabricating integrated circuits with patterned thermal adjustment layers for design optimization Mar 13, 2011 Issued
Array ( [id] => 9582746 [patent_doc_number] => 08772749 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-08 [patent_title] => 'Bottom electrodes for use with metal oxide resistivity switching layers' [patent_app_type] => utility [patent_app_number] => 13/047020 [patent_app_country] => US [patent_app_date] => 2011-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 30 [patent_no_of_words] => 10497 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13047020 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/047020
Bottom electrodes for use with metal oxide resistivity switching layers Mar 13, 2011 Issued
Array ( [id] => 9216680 [patent_doc_number] => 08629483 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-14 [patent_title] => 'Locally 2 sided CHC DRAM access transistor structure' [patent_app_type] => utility [patent_app_number] => 13/047774 [patent_app_country] => US [patent_app_date] => 2011-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1207 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13047774 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/047774
Locally 2 sided CHC DRAM access transistor structure Mar 13, 2011 Issued
Array ( [id] => 9389256 [patent_doc_number] => 08685854 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-01 [patent_title] => 'Method of forming a via in a semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/046331 [patent_app_country] => US [patent_app_date] => 2011-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 27 [patent_no_of_words] => 10653 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13046331 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/046331
Method of forming a via in a semiconductor device Mar 10, 2011 Issued
Array ( [id] => 6010572 [patent_doc_number] => 20110220969 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-15 [patent_title] => 'SOLID STATE IMAGING DEVICE' [patent_app_type] => utility [patent_app_number] => 13/046113 [patent_app_country] => US [patent_app_date] => 2011-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 9412 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0220/20110220969.pdf [firstpage_image] =>[orig_patent_app_number] => 13046113 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/046113
Solid state imaging device having high sensitivity and high pixel density Mar 10, 2011 Issued
Array ( [id] => 6010495 [patent_doc_number] => 20110220892 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-15 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/046564 [patent_app_country] => US [patent_app_date] => 2011-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8081 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0220/20110220892.pdf [firstpage_image] =>[orig_patent_app_number] => 13046564 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/046564
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME Mar 10, 2011 Abandoned
Array ( [id] => 9989508 [patent_doc_number] => 09034711 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-05-19 [patent_title] => 'LDMOS with two gate stacks having different work functions for improved breakdown voltage' [patent_app_type] => utility [patent_app_number] => 13/046332 [patent_app_country] => US [patent_app_date] => 2011-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 23 [patent_no_of_words] => 4417 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13046332 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/046332
LDMOS with two gate stacks having different work functions for improved breakdown voltage Mar 10, 2011 Issued
Array ( [id] => 8702006 [patent_doc_number] => 08395229 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-12 [patent_title] => 'MEMS-based getter microdevice' [patent_app_type] => utility [patent_app_number] => 13/046403 [patent_app_country] => US [patent_app_date] => 2011-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 5385 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13046403 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/046403
MEMS-based getter microdevice Mar 10, 2011 Issued
Array ( [id] => 6082103 [patent_doc_number] => 20110143525 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-16 [patent_title] => 'NITRIDE SEMICONDUCTOR SUBSTRATE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/031425 [patent_app_country] => US [patent_app_date] => 2011-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4883 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0143/20110143525.pdf [firstpage_image] =>[orig_patent_app_number] => 13031425 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/031425
Method of manufacturing nitride semiconductor substrates having a base substrate with parallel trenches Feb 20, 2011 Issued
Array ( [id] => 6153221 [patent_doc_number] => 20110156044 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'DENSE ARRAYS AND CHARGE STORAGE DEVICES' [patent_app_type] => utility [patent_app_number] => 13/027113 [patent_app_country] => US [patent_app_date] => 2011-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 86 [patent_figures_cnt] => 86 [patent_no_of_words] => 44363 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0156/20110156044.pdf [firstpage_image] =>[orig_patent_app_number] => 13027113 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/027113
DENSE ARRAYS AND CHARGE STORAGE DEVICES Feb 13, 2011 Abandoned
Array ( [id] => 5940838 [patent_doc_number] => 20110101458 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-05 [patent_title] => 'SOI type semiconductor device having a protection circuit' [patent_app_type] => utility [patent_app_number] => 12/929282 [patent_app_country] => US [patent_app_date] => 2011-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6579 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0101/20110101458.pdf [firstpage_image] =>[orig_patent_app_number] => 12929282 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/929282
SOI type semiconductor device having a protection circuit Jan 11, 2011 Abandoned
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