Search

Hsien Ming Lee

Examiner (ID: 4536)

Most Active Art Unit
2823
Art Unit(s)
2823, 2814
Total Applications
2378
Issued Applications
2182
Pending Applications
28
Abandoned Applications
178

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19766045 [patent_doc_number] => 12224348 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-11 [patent_title] => Semiconductor device structure and method for forming the same [patent_app_type] => utility [patent_app_number] => 18/635530 [patent_app_country] => US [patent_app_date] => 2024-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 61 [patent_no_of_words] => 9005 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18635530 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/635530
Semiconductor device structure and method for forming the same Apr 14, 2024 Issued
Array ( [id] => 19767393 [patent_doc_number] => 12225709 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-11 [patent_title] => Semiconductor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 18/582672 [patent_app_country] => US [patent_app_date] => 2024-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4120 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18582672 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/582672
Semiconductor device and manufacturing method thereof Feb 20, 2024 Issued
Array ( [id] => 19193519 [patent_doc_number] => 20240172432 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => Integrated Assemblies Having Transistor Body Regions Coupled to Carrier-Sink-Structures; and Methods of Forming Integrated Assemblies [patent_app_type] => utility [patent_app_number] => 18/428325 [patent_app_country] => US [patent_app_date] => 2024-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9364 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 370 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18428325 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/428325
Integrated assemblies having transistor body regions coupled to carrier-sink-structures; and methods of forming integrated assemblies Jan 30, 2024 Issued
Array ( [id] => 19294488 [patent_doc_number] => 12033851 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-07-09 [patent_title] => Left-ISD-LTSEE {low electrostatic field transistor (LEFT) using implanted S/D and selective low temperature epitaxial extension (ISD-LTSEE)} [patent_app_type] => utility [patent_app_number] => 18/417199 [patent_app_country] => US [patent_app_date] => 2024-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 3474 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 348 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18417199 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/417199
Left-ISD-LTSEE {low electrostatic field transistor (LEFT) using implanted S/D and selective low temperature epitaxial extension (ISD-LTSEE)} Jan 18, 2024 Issued
Array ( [id] => 19875111 [patent_doc_number] => 12267997 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-01 [patent_title] => Microelectronic devices comprising stack structures having pillars and elliptical conductive contacts [patent_app_type] => utility [patent_app_number] => 18/394273 [patent_app_country] => US [patent_app_date] => 2023-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 17306 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18394273 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/394273
Microelectronic devices comprising stack structures having pillars and elliptical conductive contacts Dec 21, 2023 Issued
Array ( [id] => 19888298 [patent_doc_number] => 12274047 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-08 [patent_title] => Line bending control for memory applications [patent_app_type] => utility [patent_app_number] => 18/394479 [patent_app_country] => US [patent_app_date] => 2023-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 3721 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18394479 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/394479
Line bending control for memory applications Dec 21, 2023 Issued
Array ( [id] => 19342712 [patent_doc_number] => 12052920 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-07-30 [patent_title] => Preparation method of contact material with high thermal stability and low contact resistance based on MgAgSb-based thermoelectric material [patent_app_type] => utility [patent_app_number] => 18/533907 [patent_app_country] => US [patent_app_date] => 2023-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4303 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18533907 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/533907
Preparation method of contact material with high thermal stability and low contact resistance based on MgAgSb-based thermoelectric material Dec 7, 2023 Issued
Array ( [id] => 19024883 [patent_doc_number] => 20240081054 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/506906 [patent_app_country] => US [patent_app_date] => 2023-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9492 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18506906 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/506906
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Nov 9, 2023 Abandoned
Array ( [id] => 18993054 [patent_doc_number] => 20240065023 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/500183 [patent_app_country] => US [patent_app_date] => 2023-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11931 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18500183 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/500183
Display device Nov 1, 2023 Issued
Array ( [id] => 19721915 [patent_doc_number] => 12207473 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-21 [patent_title] => Memory devices [patent_app_type] => utility [patent_app_number] => 18/499703 [patent_app_country] => US [patent_app_date] => 2023-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 14779 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18499703 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/499703
Memory devices Oct 31, 2023 Issued
Array ( [id] => 19721911 [patent_doc_number] => 12207469 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-21 [patent_title] => Vertical memory devices and methods of manufacturing the same [patent_app_type] => utility [patent_app_number] => 18/386112 [patent_app_country] => US [patent_app_date] => 2023-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 9425 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18386112 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/386112
Vertical memory devices and methods of manufacturing the same Oct 31, 2023 Issued
Array ( [id] => 19783267 [patent_doc_number] => 12232322 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => 3D RAM SL/BL contact modulation [patent_app_type] => utility [patent_app_number] => 18/497035 [patent_app_country] => US [patent_app_date] => 2023-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 81 [patent_no_of_words] => 13480 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18497035 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/497035
3D RAM SL/BL contact modulation Oct 29, 2023 Issued
Array ( [id] => 18898649 [patent_doc_number] => 20240014134 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => SEMICONDUCTOR DEVICE AND DATA STORAGE SYSTEM INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/370913 [patent_app_country] => US [patent_app_date] => 2023-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19233 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18370913 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/370913
Semiconductor device and data storage system including the same Sep 20, 2023 Issued
Array ( [id] => 19766067 [patent_doc_number] => 12224371 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-11 [patent_title] => High-speed layout method and layout device for photovoltaic modules [patent_app_type] => utility [patent_app_number] => 18/729977 [patent_app_country] => US [patent_app_date] => 2023-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 5952 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 387 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18729977 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/729977
High-speed layout method and layout device for photovoltaic modules Sep 18, 2023 Issued
Array ( [id] => 19901503 [patent_doc_number] => 12279456 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-15 [patent_title] => Semiconductor device with buried gate structures [patent_app_type] => utility [patent_app_number] => 18/368689 [patent_app_country] => US [patent_app_date] => 2023-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 6197 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18368689 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/368689
Semiconductor device with buried gate structures Sep 14, 2023 Issued
Array ( [id] => 18851159 [patent_doc_number] => 20230413563 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => MEMORY DEVICES INCLUDING DIFFERENT TIER PITCHES, AND RELATED ELECTRONIC SYSTEMS [patent_app_type] => utility [patent_app_number] => 18/460462 [patent_app_country] => US [patent_app_date] => 2023-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14348 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18460462 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/460462
Memory devices including different tier pitches, and related electronic systems Aug 31, 2023 Issued
Array ( [id] => 18821333 [patent_doc_number] => 20230395674 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING GATE STRUCTURE AND SEPARATION STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/236823 [patent_app_country] => US [patent_app_date] => 2023-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9583 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18236823 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/236823
Semiconductor device including gate structure and separation structure Aug 21, 2023 Issued
Array ( [id] => 18812678 [patent_doc_number] => 20230387015 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => CELL STRUCTURE WITH INTERMEDIATE METAL LAYERS FOR POWER SUPPLIES [patent_app_type] => utility [patent_app_number] => 18/448005 [patent_app_country] => US [patent_app_date] => 2023-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5208 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18448005 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/448005
Cell structure with intermediate metal layers for power supplies Aug 9, 2023 Issued
Array ( [id] => 18814957 [patent_doc_number] => 20230389295 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR STRUCTURE, SEMICONDUCTOR STRUCTURE, AND MEMORY [patent_app_type] => utility [patent_app_number] => 18/363819 [patent_app_country] => US [patent_app_date] => 2023-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4866 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18363819 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/363819
Method of manufacturing semiconductor structure, semiconductor structure, and memory Aug 1, 2023 Issued
Array ( [id] => 19444586 [patent_doc_number] => 12094877 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-17 [patent_title] => Semiconductor device and method [patent_app_type] => utility [patent_app_number] => 18/359492 [patent_app_country] => US [patent_app_date] => 2023-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 9770 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18359492 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/359492
Semiconductor device and method Jul 25, 2023 Issued
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