Search

Hsien Ming Lee

Examiner (ID: 17169, Phone: (571)272-1863 , Office: P/2823 )

Most Active Art Unit
2823
Art Unit(s)
2814, 2823
Total Applications
2377
Issued Applications
2182
Pending Applications
27
Abandoned Applications
178

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17878655 [patent_doc_number] => 11450679 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-20 [patent_title] => Three-dimensional memory device including stairless word line contact structures for and method of making the same [patent_app_type] => utility [patent_app_number] => 16/918493 [patent_app_country] => US [patent_app_date] => 2020-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 72 [patent_figures_cnt] => 82 [patent_no_of_words] => 23388 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16918493 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/918493
Three-dimensional memory device including stairless word line contact structures for and method of making the same Jun 30, 2020 Issued
Array ( [id] => 17262929 [patent_doc_number] => 20210375914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => METHODS FOR FORMING THREE-DIMENSIONAL MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 16/913677 [patent_app_country] => US [patent_app_date] => 2020-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25516 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16913677 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/913677
Methods for forming three-dimensional memory devices Jun 25, 2020 Issued
Array ( [id] => 19016348 [patent_doc_number] => 11923290 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-05 [patent_title] => Halogen treatment for NMOS contact resistance improvement [patent_app_type] => utility [patent_app_number] => 16/913859 [patent_app_country] => US [patent_app_date] => 2020-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 5363 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16913859 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/913859
Halogen treatment for NMOS contact resistance improvement Jun 25, 2020 Issued
Array ( [id] => 17332321 [patent_doc_number] => 11222789 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-11 [patent_title] => Staircase structure for three-dimensional memory [patent_app_type] => utility [patent_app_number] => 16/909537 [patent_app_country] => US [patent_app_date] => 2020-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 12498 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16909537 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/909537
Staircase structure for three-dimensional memory Jun 22, 2020 Issued
Array ( [id] => 17516826 [patent_doc_number] => 11295987 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-05 [patent_title] => Output circuit [patent_app_type] => utility [patent_app_number] => 16/905136 [patent_app_country] => US [patent_app_date] => 2020-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 30 [patent_no_of_words] => 13542 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16905136 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/905136
Output circuit Jun 17, 2020 Issued
Array ( [id] => 17303020 [patent_doc_number] => 20210398859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-23 [patent_title] => METHODS OF FORMING MICROELECTRONIC DEVICES, AND RELATED MICROELECTRONIC DEVICES AND ELECTRONIC SYSTEMS [patent_app_type] => utility [patent_app_number] => 16/905763 [patent_app_country] => US [patent_app_date] => 2020-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15979 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16905763 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/905763
Methods of forming microelectronic devices, and related microelectronic devices and electronic systems Jun 17, 2020 Issued
Array ( [id] => 17303167 [patent_doc_number] => 20210399006 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-23 [patent_title] => MICROELECTRONIC DEVICES INCLUDING A VARYING TIER PITCH, AND RELATED ELECTRONIC SYSTEMS AND METHODS [patent_app_type] => utility [patent_app_number] => 16/904317 [patent_app_country] => US [patent_app_date] => 2020-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14287 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16904317 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/904317
Microelectronic devices including a varying tier pitch, and related electronic systems and methods Jun 16, 2020 Issued
Array ( [id] => 17652758 [patent_doc_number] => 11355498 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-07 [patent_title] => Integrated circuit device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/902506 [patent_app_country] => US [patent_app_date] => 2020-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 44 [patent_no_of_words] => 9534 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16902506 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/902506
Integrated circuit device and manufacturing method thereof Jun 15, 2020 Issued
Array ( [id] => 17010895 [patent_doc_number] => 20210242056 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-05 [patent_title] => MASS TRANSFER METHOD AND MASS TRANSFER DEVICE THEREOF FOR MICRO LED DEVICE [patent_app_type] => utility [patent_app_number] => 17/269831 [patent_app_country] => US [patent_app_date] => 2020-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4190 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17269831 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/269831
Mass transfer method and mass transfer device thereof for micro led device Jun 14, 2020 Issued
Array ( [id] => 17381214 [patent_doc_number] => 11239247 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-01 [patent_title] => Memory device and method for forming the same [patent_app_type] => utility [patent_app_number] => 16/900511 [patent_app_country] => US [patent_app_date] => 2020-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 29 [patent_no_of_words] => 13391 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16900511 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/900511
Memory device and method for forming the same Jun 11, 2020 Issued
Array ( [id] => 17295418 [patent_doc_number] => 20210391257 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-16 [patent_title] => MICROELECTRONIC DEVICES INCLUDING STAIRCASE STRUCTURES, AND RELATED MEMORY DEVICES AND ELECTRONIC SYSTEMS [patent_app_type] => utility [patent_app_number] => 16/900204 [patent_app_country] => US [patent_app_date] => 2020-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13866 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16900204 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/900204
Microelectronic devices including staircase structures, and related memory devices and electronic systems Jun 11, 2020 Issued
Array ( [id] => 17855185 [patent_doc_number] => 20220285228 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-08 [patent_title] => METHOD FOR EVALUATING SEMICONDUCTOR SUBSTRATE [patent_app_type] => utility [patent_app_number] => 17/634365 [patent_app_country] => US [patent_app_date] => 2020-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4369 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17634365 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/634365
Method for evaluating semiconductor substrate Jun 3, 2020 Issued
Array ( [id] => 17941870 [patent_doc_number] => 11476332 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-18 [patent_title] => Integrated assemblies, and methods of forming integrated assemblies [patent_app_type] => utility [patent_app_number] => 16/890296 [patent_app_country] => US [patent_app_date] => 2020-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 8053 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16890296 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/890296
Integrated assemblies, and methods of forming integrated assemblies Jun 1, 2020 Issued
Array ( [id] => 17262923 [patent_doc_number] => 20210375908 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => THREE-DIMENSIONAL MEMORY DEVICE CONTAINING III-V COMPOUND SEMICONDUCTOR CHANNEL AND CONTACTS AND METHOD OF MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 16/887659 [patent_app_country] => US [patent_app_date] => 2020-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 32572 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16887659 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/887659
Three-dimensional memory device containing III-V compound semiconductor channel and contacts and method of making the same May 28, 2020 Issued
Array ( [id] => 17262914 [patent_doc_number] => 20210375899 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/887749 [patent_app_country] => US [patent_app_date] => 2020-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8536 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16887749 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/887749
Semiconductor device and manufacturing method thereof May 28, 2020 Issued
Array ( [id] => 17262922 [patent_doc_number] => 20210375907 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => Integrated Assemblies and Methods of Forming Integrated Assemblies [patent_app_type] => utility [patent_app_number] => 16/885720 [patent_app_country] => US [patent_app_date] => 2020-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9613 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -35 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16885720 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/885720
Integrated assemblies and methods of forming integrated assemblies May 27, 2020 Issued
Array ( [id] => 17188922 [patent_doc_number] => 20210335807 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-28 [patent_title] => THREE-DIMENSIONAL MEMORY DEVICE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/886570 [patent_app_country] => US [patent_app_date] => 2020-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9770 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16886570 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/886570
Three-dimensional memory device and method for forming the same May 27, 2020 Issued
Array ( [id] => 17262710 [patent_doc_number] => 20210375695 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => Semiconductor Device and Method [patent_app_type] => utility [patent_app_number] => 16/884972 [patent_app_country] => US [patent_app_date] => 2020-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11427 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16884972 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/884972
Semiconductor device and method May 26, 2020 Issued
Array ( [id] => 16765675 [patent_doc_number] => 20210111257 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-15 [patent_title] => VERTICAL FIELD EFFECT TRANSISTOR WITH SELF-ALIGNED CONTACT STRUCTURE AND LAYOUT [patent_app_type] => utility [patent_app_number] => 16/883308 [patent_app_country] => US [patent_app_date] => 2020-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4625 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16883308 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/883308
Vertical field effect transistor with self-aligned contact structure and layout May 25, 2020 Issued
Array ( [id] => 17152560 [patent_doc_number] => 11145651 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-12 [patent_title] => Transistor gate arrangement to modify driver signal characteristics [patent_app_type] => utility [patent_app_number] => 16/882634 [patent_app_country] => US [patent_app_date] => 2020-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 6620 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16882634 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/882634
Transistor gate arrangement to modify driver signal characteristics May 24, 2020 Issued
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