Hsien Ming Lee

Array ( [id] => 18789290 [patent_doc_number] => 20230377941 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => Buried Metal for FinFET Device and Method [patent_app_type] => utility [patent_app_number] => 18/358321 [patent_app_country] => US [patent_app_date] => 2023-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13129 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18358321 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18776413 [patent_doc_number] => 20230371251 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/225561 [patent_app_country] => US [patent_app_date] => 2023-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8586 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18225561 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18729533 [patent_doc_number] => 20230343829 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-26 [patent_title] => ELECTRONIC DEVICE WITH GALLIUM NITRIDE TRANSISTORS AND METHOD OF MAKING SAME [patent_app_type] => utility [patent_app_number] => 18/347234 [patent_app_country] => US [patent_app_date] => 2023-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8910 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18347234 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19844118 [patent_doc_number] => 12256534 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-18 [patent_title] => Semiconductor device having double bit capacity and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 18/218218 [patent_app_country] => US [patent_app_date] => 2023-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 6979 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18218218 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18729412 [patent_doc_number] => 20230343708 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-26 [patent_title] => SEMICONDUCTOR DEVICE, AND ASSOCIATED METHOD AND SYSTEM [patent_app_type] => utility [patent_app_number] => 18/341947 [patent_app_country] => US [patent_app_date] => 2023-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6607 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18341947 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19553879 [patent_doc_number] => 12137602 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-05 [patent_title] => Display apparatus [patent_app_type] => utility [patent_app_number] => 18/336908 [patent_app_country] => US [patent_app_date] => 2023-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 9746 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18336908 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19654500 [patent_doc_number] => 12176300 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-24 [patent_title] => Memory device including support structures [patent_app_type] => utility [patent_app_number] => 18/209231 [patent_app_country] => US [patent_app_date] => 2023-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 23 [patent_no_of_words] => 12045 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18209231 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18679951 [patent_doc_number] => 20230317609 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => THREE-DIMENSIONAL MEMORY DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/328416 [patent_app_country] => US [patent_app_date] => 2023-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11245 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18328416 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19229702 [patent_doc_number] => 12009346 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-11 [patent_title] => Semiconductor device and method of fabricating the same [patent_app_type] => utility [patent_app_number] => 18/328389 [patent_app_country] => US [patent_app_date] => 2023-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 10753 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18328389 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19370445 [patent_doc_number] => 12062539 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-13 [patent_title] => Semiconductor-on-insulator (SOI) substrate and method for forming [patent_app_type] => utility [patent_app_number] => 18/328102 [patent_app_country] => US [patent_app_date] => 2023-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 31 [patent_no_of_words] => 10826 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18328102 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19357037 [patent_doc_number] => 12057495 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-06 [patent_title] => Semiconductor device with conformal source/drain layer [patent_app_type] => utility [patent_app_number] => 18/326682 [patent_app_country] => US [patent_app_date] => 2023-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 60 [patent_figures_cnt] => 60 [patent_no_of_words] => 9334 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18326682 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19046672 [patent_doc_number] => 11935792 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-19 [patent_title] => Semiconductor device having buried gate structure and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 18/316244 [patent_app_country] => US [patent_app_date] => 2023-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 43 [patent_no_of_words] => 15995 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18316244 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19796309 [patent_doc_number] => 12237278 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-25 [patent_title] => Active protection circuits for semiconductor devices [patent_app_type] => utility [patent_app_number] => 18/142992 [patent_app_country] => US [patent_app_date] => 2023-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6024 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18142992 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19582531 [patent_doc_number] => 12148659 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-19 [patent_title] => Contact conductive feature formation and structure [patent_app_type] => utility [patent_app_number] => 18/308743 [patent_app_country] => US [patent_app_date] => 2023-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5919 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18308743 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19296157 [patent_doc_number] => 12035534 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-09 [patent_title] => Three-dimensional memory array with local line selector [patent_app_type] => utility [patent_app_number] => 18/308031 [patent_app_country] => US [patent_app_date] => 2023-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 108 [patent_no_of_words] => 13562 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18308031 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19328970 [patent_doc_number] => 12046662 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-23 [patent_title] => Semiconductor device structure with barrier layer [patent_app_type] => utility [patent_app_number] => 18/307187 [patent_app_country] => US [patent_app_date] => 2023-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 43 [patent_no_of_words] => 13156 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18307187 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18570773 [patent_doc_number] => 20230261110 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-17 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/304422 [patent_app_country] => US [patent_app_date] => 2023-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8973 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18304422 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19399780 [patent_doc_number] => 12074168 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-27 [patent_title] => Semiconductor device and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 18/136216 [patent_app_country] => US [patent_app_date] => 2023-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 64 [patent_no_of_words] => 12382 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18136216 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19213685 [patent_doc_number] => 12002757 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-04 [patent_title] => Staircase structure in three-dimensional memory device and method for forming the same [patent_app_type] => utility [patent_app_number] => 18/135596 [patent_app_country] => US [patent_app_date] => 2023-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 20 [patent_no_of_words] => 13490 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18135596 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18514625 [patent_doc_number] => 20230230885 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-20 [patent_title] => Semiconductor Device and Method [patent_app_type] => utility [patent_app_number] => 18/189437 [patent_app_country] => US [patent_app_date] => 2023-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11493 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18189437 [rel_patent_id] =>[rel_patent_doc_number] =>)