
Hsien Ming Lee
Examiner (ID: 14918, Phone: (571)272-1863 , Office: P/2823 )
| Most Active Art Unit | 2823 |
| Art Unit(s) | 2823, 2814 |
| Total Applications | 2377 |
| Issued Applications | 2182 |
| Pending Applications | 27 |
| Abandoned Applications | 178 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 14889093
[patent_doc_number] => 10424597
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-09-24
[patent_title] => Semiconductor device and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 16/284948
[patent_app_country] => US
[patent_app_date] => 2019-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 30
[patent_no_of_words] => 10712
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 196
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16284948
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/284948 | Semiconductor device and manufacturing method thereof | Feb 24, 2019 | Issued |
Array
(
[id] => 14446695
[patent_doc_number] => 20190181221
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-06-13
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/266229
[patent_app_country] => US
[patent_app_date] => 2019-02-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11884
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16266229
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/266229 | Semiconductor device and method for producing semiconductor device | Feb 3, 2019 | Issued |
Array
(
[id] => 19373904
[patent_doc_number] => 12065453
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-08-20
[patent_title] => Lanthanoid compound, lanthanoid-containing thin film and formation of lanthanoid-containing thin film using the lanthanoid compound
[patent_app_type] => utility
[patent_app_number] => 16/964811
[patent_app_country] => US
[patent_app_date] => 2019-01-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 9808
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 19
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16964811
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/964811 | Lanthanoid compound, lanthanoid-containing thin film and formation of lanthanoid-containing thin film using the lanthanoid compound | Jan 21, 2019 | Issued |
Array
(
[id] => 15250419
[patent_doc_number] => 10510738
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-12-17
[patent_title] => Three-dimensional memory device having support-die-assisted source power distribution and method of making thereof
[patent_app_type] => utility
[patent_app_number] => 16/243469
[patent_app_country] => US
[patent_app_date] => 2019-01-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 56
[patent_figures_cnt] => 67
[patent_no_of_words] => 31463
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16243469
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/243469 | Three-dimensional memory device having support-die-assisted source power distribution and method of making thereof | Jan 8, 2019 | Issued |
Array
(
[id] => 14350453
[patent_doc_number] => 20190157199
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-05-23
[patent_title] => MICROELECTRONIC COMPONENTS WITH FEATURES WRAPPING AROUND PROTRUSIONS OF CONDUCTIVE VIAS PROTRUDING FROM THROUGH-HOLES PASSING THROUGH SUBSTRATES
[patent_app_type] => utility
[patent_app_number] => 16/238786
[patent_app_country] => US
[patent_app_date] => 2019-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11090
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16238786
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/238786 | Microelectronic components with features wrapping around protrusions of conductive vias protruding from through-holes passing through substrates | Jan 2, 2019 | Issued |
Array
(
[id] => 14285159
[patent_doc_number] => 20190139864
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-05-09
[patent_title] => CAPPED THROUGH-SILICON-VIAs FOR 3D INTEGRATED CIRCUITS
[patent_app_type] => utility
[patent_app_number] => 16/235814
[patent_app_country] => US
[patent_app_date] => 2018-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2693
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -29
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16235814
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/235814 | Capped through-silicon-vias for 3D integrated circuits | Dec 27, 2018 | Issued |
Array
(
[id] => 19093921
[patent_doc_number] => 11955386
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-04-09
[patent_title] => Method for evaluating defective region of wafer
[patent_app_type] => utility
[patent_app_number] => 17/267566
[patent_app_country] => US
[patent_app_date] => 2018-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6066
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17267566
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/267566 | Method for evaluating defective region of wafer | Dec 26, 2018 | Issued |
Array
(
[id] => 18135794
[patent_doc_number] => 11561463
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-01-24
[patent_title] => Substrate with conductive film, substrate with multilayer reflective film, reflective mask blank, reflective mask, and semiconductor device manufacturing method
[patent_app_type] => utility
[patent_app_number] => 16/955734
[patent_app_country] => US
[patent_app_date] => 2018-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 12
[patent_no_of_words] => 14745
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16955734
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/955734 | Substrate with conductive film, substrate with multilayer reflective film, reflective mask blank, reflective mask, and semiconductor device manufacturing method | Dec 20, 2018 | Issued |
Array
(
[id] => 15286581
[patent_doc_number] => 10515960
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-12-24
[patent_title] => Semiconductor device and method
[patent_app_type] => utility
[patent_app_number] => 16/222300
[patent_app_country] => US
[patent_app_date] => 2018-12-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 10321
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16222300
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/222300 | Semiconductor device and method | Dec 16, 2018 | Issued |
Array
(
[id] => 16264533
[patent_doc_number] => 10755977
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-08-25
[patent_title] => Semiconductor device and method for manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 16/222640
[patent_app_country] => US
[patent_app_date] => 2018-12-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 8948
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16222640
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/222640 | Semiconductor device and method for manufacturing the same | Dec 16, 2018 | Issued |
Array
(
[id] => 15611745
[patent_doc_number] => 10586945
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-03-10
[patent_title] => Display device
[patent_app_type] => utility
[patent_app_number] => 16/221731
[patent_app_country] => US
[patent_app_date] => 2018-12-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 11861
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 256
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16221731
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/221731 | Display device | Dec 16, 2018 | Issued |
Array
(
[id] => 16199828
[patent_doc_number] => 10724983
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-07-28
[patent_title] => Sensor device and a method for forming the sensor device
[patent_app_type] => utility
[patent_app_number] => 16/215688
[patent_app_country] => US
[patent_app_date] => 2018-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 17
[patent_no_of_words] => 12017
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 230
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16215688
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/215688 | Sensor device and a method for forming the sensor device | Dec 10, 2018 | Issued |
Array
(
[id] => 14475959
[patent_doc_number] => 20190189628
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-06-20
[patent_title] => TWO-TERMINAL NON-VOLATILE MEMRISTOR AND MEMORY
[patent_app_type] => utility
[patent_app_number] => 16/215900
[patent_app_country] => US
[patent_app_date] => 2018-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6191
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 145
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16215900
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/215900 | Two-terminal non-volatile memristor and memory | Dec 10, 2018 | Issued |
Array
(
[id] => 16021123
[patent_doc_number] => 20200185405
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-06-11
[patent_title] => THREE-DIMENSIONAL MEMORY DEVICE INCLUDING DIFFERENT HEIGHT MEMORY STACK STRUCTURES AND METHODS OF MAKING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/215912
[patent_app_country] => US
[patent_app_date] => 2018-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19899
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 251
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16215912
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/215912 | Three-dimensional memory device including different height memory stack structures and methods of making the same | Dec 10, 2018 | Issued |
Array
(
[id] => 16410118
[patent_doc_number] => 10818684
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-10-27
[patent_title] => Vertical memory devices and methods of manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 16/215842
[patent_app_country] => US
[patent_app_date] => 2018-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 10422
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16215842
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/215842 | Vertical memory devices and methods of manufacturing the same | Dec 10, 2018 | Issued |
Array
(
[id] => 16280317
[patent_doc_number] => 10763358
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-09-01
[patent_title] => High voltage semiconductor device and method of manufacturing same
[patent_app_type] => utility
[patent_app_number] => 16/215017
[patent_app_country] => US
[patent_app_date] => 2018-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6670
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16215017
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/215017 | High voltage semiconductor device and method of manufacturing same | Dec 9, 2018 | Issued |
Array
(
[id] => 16276644
[patent_doc_number] => 10759658
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-09-01
[patent_title] => Hermetic vertical shear weld wafer bonding
[patent_app_type] => utility
[patent_app_number] => 16/215628
[patent_app_country] => US
[patent_app_date] => 2018-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 11
[patent_no_of_words] => 5176
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16215628
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/215628 | Hermetic vertical shear weld wafer bonding | Dec 9, 2018 | Issued |
Array
(
[id] => 15717941
[patent_doc_number] => 20200105738
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-04-02
[patent_title] => SEMICONDUCTOR DEVICE WITH MULTIPLE POLARITY GROUPS
[patent_app_type] => utility
[patent_app_number] => 16/215325
[patent_app_country] => US
[patent_app_date] => 2018-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8994
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16215325
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/215325 | Semiconductor device with multiple polarity groups | Dec 9, 2018 | Issued |
Array
(
[id] => 16293704
[patent_doc_number] => 10770560
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-09-08
[patent_title] => Semiconductor devices
[patent_app_type] => utility
[patent_app_number] => 16/214537
[patent_app_country] => US
[patent_app_date] => 2018-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 13092
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 185
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16214537
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/214537 | Semiconductor devices | Dec 9, 2018 | Issued |
Array
(
[id] => 16021221
[patent_doc_number] => 20200185454
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-06-11
[patent_title] => MTJ Patterning without Etch Induced Device Degradation Assisted by Hard Mask Trimming
[patent_app_type] => utility
[patent_app_number] => 16/215094
[patent_app_country] => US
[patent_app_date] => 2018-12-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1988
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16215094
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/215094 | MTJ patterning without etch induced device degradation assisted by hard mask trimming | Dec 9, 2018 | Issued |