Search

Hsien Ming Lee

Examiner (ID: 17169, Phone: (571)272-1863 , Office: P/2823 )

Most Active Art Unit
2823
Art Unit(s)
2814, 2823
Total Applications
2377
Issued Applications
2182
Pending Applications
27
Abandoned Applications
178

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13878763 [patent_doc_number] => 20190035722 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-31 [patent_title] => WAFER-SCALE POWER DELIVERY [patent_app_type] => utility [patent_app_number] => 16/150439 [patent_app_country] => US [patent_app_date] => 2018-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6670 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16150439 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/150439
Wafer-scale power delivery Oct 2, 2018 Issued
Array ( [id] => 15112677 [patent_doc_number] => 10477691 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-12 [patent_title] => Flexible display device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/145194 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4209 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16145194 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/145194
Flexible display device and manufacturing method thereof Sep 27, 2018 Issued
Array ( [id] => 15718247 [patent_doc_number] => 20200105891 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => STACKED SELF-ALIGNED TRANSISTORS WITH SINGLE WORKFUNCTION METAL [patent_app_type] => utility [patent_app_number] => 16/145123 [patent_app_country] => US [patent_app_date] => 2018-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13347 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16145123 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/145123
Stacked self-aligned transistors with single workfunction metal Sep 26, 2018 Issued
Array ( [id] => 15475533 [patent_doc_number] => 10553653 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-02-04 [patent_title] => Display panel and display apparatus having the same [patent_app_type] => utility [patent_app_number] => 16/137869 [patent_app_country] => US [patent_app_date] => 2018-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 9690 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16137869 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/137869
Display panel and display apparatus having the same Sep 20, 2018 Issued
Array ( [id] => 14542661 [patent_doc_number] => 20190206952 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-07-04 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/133836 [patent_app_country] => US [patent_app_date] => 2018-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8407 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16133836 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/133836
Display device Sep 17, 2018 Issued
Array ( [id] => 15857127 [patent_doc_number] => 10643859 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-05 [patent_title] => Hydrofluorocarbon gas-assisted plasma etch for interconnect fabrication [patent_app_type] => utility [patent_app_number] => 16/130596 [patent_app_country] => US [patent_app_date] => 2018-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2094 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16130596 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/130596
Hydrofluorocarbon gas-assisted plasma etch for interconnect fabrication Sep 12, 2018 Issued
Array ( [id] => 15580881 [patent_doc_number] => 10580835 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-03 [patent_title] => Display panel [patent_app_type] => utility [patent_app_number] => 16/125562 [patent_app_country] => US [patent_app_date] => 2018-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8721 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16125562 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/125562
Display panel Sep 6, 2018 Issued
Array ( [id] => 15286549 [patent_doc_number] => 10515944 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-24 [patent_title] => Integrated circuit and method of generating integrated circuit layout [patent_app_type] => utility [patent_app_number] => 16/122762 [patent_app_country] => US [patent_app_date] => 2018-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6136 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16122762 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/122762
Integrated circuit and method of generating integrated circuit layout Sep 4, 2018 Issued
Array ( [id] => 15598433 [patent_doc_number] => 20200075751 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => GATED DIODE HAVING FINGERS WITH ELEVATED GATES [patent_app_type] => utility [patent_app_number] => 16/122841 [patent_app_country] => US [patent_app_date] => 2018-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3947 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16122841 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/122841
Gated diode having fingers with elevated gates Sep 4, 2018 Issued
Array ( [id] => 14024753 [patent_doc_number] => 20190074370 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-07 [patent_title] => SEMICONDUCTOR DEVICE PRIMARILY MADE OF NITRIDE SEMICONDUCTOR MATERIALS AND PROCESS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/122463 [patent_app_country] => US [patent_app_date] => 2018-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6131 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16122463 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/122463
SEMICONDUCTOR DEVICE PRIMARILY MADE OF NITRIDE SEMICONDUCTOR MATERIALS AND PROCESS OF FORMING THE SAME Sep 4, 2018 Abandoned
Array ( [id] => 15823525 [patent_doc_number] => 10636963 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-28 [patent_title] => Magnetic tunnel junctions [patent_app_type] => utility [patent_app_number] => 16/122179 [patent_app_country] => US [patent_app_date] => 2018-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5663 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16122179 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/122179
Magnetic tunnel junctions Sep 4, 2018 Issued
Array ( [id] => 15889661 [patent_doc_number] => 10651186 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-12 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 16/122492 [patent_app_country] => US [patent_app_date] => 2018-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 5317 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 603 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16122492 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/122492
Semiconductor memory device Sep 4, 2018 Issued
Array ( [id] => 16201887 [patent_doc_number] => 10727065 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-28 [patent_title] => Semiconductor structure and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/122235 [patent_app_country] => US [patent_app_date] => 2018-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 35 [patent_no_of_words] => 12070 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16122235 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/122235
Semiconductor structure and manufacturing method thereof Sep 4, 2018 Issued
Array ( [id] => 14875509 [patent_doc_number] => 20190287996 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => NONVOLATILE SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/122842 [patent_app_country] => US [patent_app_date] => 2018-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6791 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16122842 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/122842
Nonvolatile semiconductor memory device Sep 4, 2018 Issued
Array ( [id] => 14676933 [patent_doc_number] => 20190237581 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-01 [patent_title] => TRANSISTOR, SEMICONDUCTOR MEMORY DEVICE, AND METHOD OF MANUFACTURING TRANSISTOR [patent_app_type] => utility [patent_app_number] => 16/122834 [patent_app_country] => US [patent_app_date] => 2018-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8428 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16122834 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/122834
Transistor, semiconductor memory device, and method of manufacturing transistor Sep 4, 2018 Issued
Array ( [id] => 15753423 [patent_doc_number] => 10618805 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-14 [patent_title] => Method to reduce pore diameter using atomic layer deposition and etching [patent_app_type] => utility [patent_app_number] => 16/122183 [patent_app_country] => US [patent_app_date] => 2018-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 2944 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16122183 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/122183
Method to reduce pore diameter using atomic layer deposition and etching Sep 4, 2018 Issued
Array ( [id] => 15597891 [patent_doc_number] => 20200075480 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/122807 [patent_app_country] => US [patent_app_date] => 2018-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3022 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16122807 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/122807
Semiconductor device and method for fabricating the same Sep 4, 2018 Issued
Array ( [id] => 15598451 [patent_doc_number] => 20200075760 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => LDMOS DEVICE WITH A FIELD PLATE CONTACT METAL LAYER WITH A SUB-MAXIMUM SIZE [patent_app_type] => utility [patent_app_number] => 16/122836 [patent_app_country] => US [patent_app_date] => 2018-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3617 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16122836 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/122836
LDMOS device with a field plate contact metal layer with a sub-maximum size Sep 4, 2018 Issued
Array ( [id] => 14138195 [patent_doc_number] => 20190103487 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-04 [patent_title] => FinFET Device and Method of Forming Same [patent_app_type] => utility [patent_app_number] => 16/122793 [patent_app_country] => US [patent_app_date] => 2018-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10170 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16122793 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/122793
FinFET device and method of forming same Sep 4, 2018 Issued
Array ( [id] => 16172800 [patent_doc_number] => 10714377 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-07-14 [patent_title] => Semiconductor device and semiconductor wafer including a porous layer and method of manufacturing [patent_app_type] => utility [patent_app_number] => 16/122456 [patent_app_country] => US [patent_app_date] => 2018-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 40 [patent_no_of_words] => 8678 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16122456 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/122456
Semiconductor device and semiconductor wafer including a porous layer and method of manufacturing Sep 4, 2018 Issued
Menu