Search

Hsien Ming Lee

Examiner (ID: 17169, Phone: (571)272-1863 , Office: P/2823 )

Most Active Art Unit
2823
Art Unit(s)
2814, 2823
Total Applications
2377
Issued Applications
2182
Pending Applications
27
Abandoned Applications
178

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13085473 [patent_doc_number] => 10062810 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-28 [patent_title] => Light-emitting diode module having light-emitting diode joined through solder paste and light-emitting diode [patent_app_type] => utility [patent_app_number] => 15/860599 [patent_app_country] => US [patent_app_date] => 2018-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 8316 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15860599 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/860599
Light-emitting diode module having light-emitting diode joined through solder paste and light-emitting diode Jan 1, 2018 Issued
Array ( [id] => 12650925 [patent_doc_number] => 20180108806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-19 [patent_title] => Patterned Layer Design for Group III Nitride Layer Growth [patent_app_type] => utility [patent_app_number] => 15/857853 [patent_app_country] => US [patent_app_date] => 2017-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12568 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15857853 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/857853
Patterned layer design for group III nitride layer growth Dec 28, 2017 Issued
Array ( [id] => 12759955 [patent_doc_number] => 20180145153 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-24 [patent_title] => METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 15/856763 [patent_app_country] => US [patent_app_date] => 2017-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25985 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15856763 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/856763
Method for manufacturing semiconductor device Dec 27, 2017 Issued
Array ( [id] => 17107451 [patent_doc_number] => 11127677 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-21 [patent_title] => Resistor structure of series resistor of ESD device [patent_app_type] => utility [patent_app_number] => 16/469135 [patent_app_country] => US [patent_app_date] => 2017-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 1439 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16469135 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/469135
Resistor structure of series resistor of ESD device Dec 25, 2017 Issued
Array ( [id] => 13293289 [patent_doc_number] => 10157845 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-18 [patent_title] => Method for fabricating a local interconnect in a semiconductor device [patent_app_type] => utility [patent_app_number] => 15/851640 [patent_app_country] => US [patent_app_date] => 2017-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 35 [patent_no_of_words] => 3867 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15851640 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/851640
Method for fabricating a local interconnect in a semiconductor device Dec 20, 2017 Issued
Array ( [id] => 12692644 [patent_doc_number] => 20180122714 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-03 [patent_title] => FLIPPED VERTICAL FIELD-EFFECT-TRANSISTOR [patent_app_type] => utility [patent_app_number] => 15/848151 [patent_app_country] => US [patent_app_date] => 2017-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8397 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15848151 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/848151
Flipped vertical field-effect-transistor Dec 19, 2017 Issued
Array ( [id] => 13214601 [patent_doc_number] => 10121676 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-06 [patent_title] => Interconnects fabricated by hydrofluorocarbon gas-assisted plasma etch [patent_app_type] => utility [patent_app_number] => 15/847369 [patent_app_country] => US [patent_app_date] => 2017-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2094 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15847369 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/847369
Interconnects fabricated by hydrofluorocarbon gas-assisted plasma etch Dec 18, 2017 Issued
Array ( [id] => 12823810 [patent_doc_number] => 20180166442 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-14 [patent_title] => FINFET DEVICE WITH EPITAXIAL STRUCTURES THAT WRAP AROUND THE FINS AND THE METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 15/838451 [patent_app_country] => US [patent_app_date] => 2017-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6574 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15838451 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/838451
FinFET device with epitaxial structures that wrap around the fins and the method of fabricating the same Dec 11, 2017 Issued
Array ( [id] => 12457875 [patent_doc_number] => 09985164 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-05-29 [patent_title] => Monolithically integrated high voltage photovoltaics and light emitting diode with textured surface [patent_app_type] => utility [patent_app_number] => 15/832926 [patent_app_country] => US [patent_app_date] => 2017-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 9062 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15832926 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/832926
Monolithically integrated high voltage photovoltaics and light emitting diode with textured surface Dec 5, 2017 Issued
Array ( [id] => 17018473 [patent_doc_number] => 11088118 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-10 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 16/464355 [patent_app_country] => US [patent_app_date] => 2017-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 8208 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 392 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16464355 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/464355
Semiconductor device Nov 29, 2017 Issued
Array ( [id] => 16684373 [patent_doc_number] => 10943864 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-09 [patent_title] => Programmable redistribution die [patent_app_type] => utility [patent_app_number] => 16/469100 [patent_app_country] => US [patent_app_date] => 2017-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5853 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16469100 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/469100
Programmable redistribution die Nov 28, 2017 Issued
Array ( [id] => 13228755 [patent_doc_number] => 10128158 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-13 [patent_title] => Laterally diffused metal oxide semiconductor device integrated with vertical field effect transistor [patent_app_type] => utility [patent_app_number] => 15/821345 [patent_app_country] => US [patent_app_date] => 2017-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 24 [patent_no_of_words] => 9108 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15821345 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/821345
Laterally diffused metal oxide semiconductor device integrated with vertical field effect transistor Nov 21, 2017 Issued
Array ( [id] => 14460227 [patent_doc_number] => 10326089 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-18 [patent_title] => Logic circuit based on thin film transistor [patent_app_type] => utility [patent_app_number] => 15/817540 [patent_app_country] => US [patent_app_date] => 2017-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 42 [patent_no_of_words] => 9686 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15817540 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/817540
Logic circuit based on thin film transistor Nov 19, 2017 Issued
Array ( [id] => 12738853 [patent_doc_number] => 20180138118 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-17 [patent_title] => INTEGRATED CIRCUIT PACKAGE SUBSTRATE [patent_app_type] => utility [patent_app_number] => 15/813866 [patent_app_country] => US [patent_app_date] => 2017-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6509 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15813866 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/813866
Integrated circuit package substrate Nov 14, 2017 Issued
Array ( [id] => 13862749 [patent_doc_number] => 10193102 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-29 [patent_title] => Display device [patent_app_type] => utility [patent_app_number] => 15/813240 [patent_app_country] => US [patent_app_date] => 2017-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 11843 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15813240 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/813240
Display device Nov 14, 2017 Issued
Array ( [id] => 12263803 [patent_doc_number] => 20180082998 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-22 [patent_title] => 'LATERALLY DIFFUSED METAL OXIDE SEMICONDUCTOR DEVICE INTEGRATED WITH VERTICAL FIELD EFFECT TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 15/800803 [patent_app_country] => US [patent_app_date] => 2017-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9481 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15800803 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/800803
Laterally diffused metal oxide semiconductor device integrated with vertical field effect transistor Oct 31, 2017 Issued
Array ( [id] => 13995733 [patent_doc_number] => 20190067024 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => UTILIZING MULTIPLE LAYERS TO INCREASE SPATIAL FREQUENCY [patent_app_type] => utility [patent_app_number] => 15/801039 [patent_app_country] => US [patent_app_date] => 2017-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6201 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15801039 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/801039
Utilizing multiple layers to increase spatial frequency Oct 31, 2017 Issued
Array ( [id] => 13057547 [patent_doc_number] => 10050175 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-14 [patent_title] => Patterned layer design for group III nitride layer growth [patent_app_type] => utility [patent_app_number] => 15/797263 [patent_app_country] => US [patent_app_date] => 2017-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 22 [patent_no_of_words] => 11411 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15797263 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/797263
Patterned layer design for group III nitride layer growth Oct 29, 2017 Issued
Array ( [id] => 12573885 [patent_doc_number] => 10020221 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-07-10 [patent_title] => Method and structure for minimizing fin reveal variation in FinFET transistor [patent_app_type] => utility [patent_app_number] => 15/787107 [patent_app_country] => US [patent_app_date] => 2017-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 4617 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15787107 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/787107
Method and structure for minimizing fin reveal variation in FinFET transistor Oct 17, 2017 Issued
Array ( [id] => 12162520 [patent_doc_number] => 20180033786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-01 [patent_title] => 'LATERALLY DIFFUSED METAL OXIDE SEMICONDUCTOR DEVICE INTEGRATED WITH VERTICAL FIELD EFFECT TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 15/730085 [patent_app_country] => US [patent_app_date] => 2017-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 9502 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15730085 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/730085
Laterally diffused metal oxide semiconductor device integrated with vertical field effect transistor Oct 10, 2017 Issued
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