Hsien Ming Lee

Array ( [id] => 19829998 [patent_doc_number] => 12250805 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-11 [patent_title] => Semiconductor device having double bit capacity and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/866720 [patent_app_country] => US [patent_app_date] => 2022-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 6950 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17866720 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19888301 [patent_doc_number] => 12274050 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-08 [patent_title] => Semiconductor device with passing gate [patent_app_type] => utility [patent_app_number] => 17/861281 [patent_app_country] => US [patent_app_date] => 2022-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 9561 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17861281 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19260873 [patent_doc_number] => 12020938 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-25 [patent_title] => Method of forming an electrode on a substrate and a semiconductor device structure including an electrode [patent_app_type] => utility [patent_app_number] => 17/859888 [patent_app_country] => US [patent_app_date] => 2022-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 12624 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17859888 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17917722 [patent_doc_number] => 20220320118 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/843762 [patent_app_country] => US [patent_app_date] => 2022-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9191 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17843762 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19048299 [patent_doc_number] => 11937430 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-19 [patent_title] => Integrated assemblies and methods of forming integrated assemblies [patent_app_type] => utility [patent_app_number] => 17/841624 [patent_app_country] => US [patent_app_date] => 2022-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 37 [patent_no_of_words] => 9645 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17841624 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19952754 [patent_doc_number] => 12324139 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-03 [patent_title] => Method for manufacturing semiconductor device and semiconductor device [patent_app_type] => utility [patent_app_number] => 17/806980 [patent_app_country] => US [patent_app_date] => 2022-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 46 [patent_no_of_words] => 2408 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17806980 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18671882 [patent_doc_number] => 11778815 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-03 [patent_title] => Semiconductor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/833834 [patent_app_country] => US [patent_app_date] => 2022-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 67 [patent_no_of_words] => 8570 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17833834 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18688494 [patent_doc_number] => 11784240 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-10 [patent_title] => Semiconductor device structure with barrier layer [patent_app_type] => utility [patent_app_number] => 17/833363 [patent_app_country] => US [patent_app_date] => 2022-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 43 [patent_no_of_words] => 13161 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17833363 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19341515 [patent_doc_number] => 12051713 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-30 [patent_title] => Solid-state image pickup element and electronic apparatus [patent_app_type] => utility [patent_app_number] => 17/828763 [patent_app_country] => US [patent_app_date] => 2022-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 10734 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17828763 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18814931 [patent_doc_number] => 20230389269 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE HAVING PROTRUSION OF WORD LINE [patent_app_type] => utility [patent_app_number] => 17/824487 [patent_app_country] => US [patent_app_date] => 2022-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8548 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17824487 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18175196 [patent_doc_number] => 11574913 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-02-07 [patent_title] => Semiconductor structure and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/664906 [patent_app_country] => US [patent_app_date] => 2022-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 19 [patent_no_of_words] => 5936 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17664906 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17870895 [patent_doc_number] => 20220293632 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/824821 [patent_app_country] => US [patent_app_date] => 2022-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9641 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17824821 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19566094 [patent_doc_number] => 12140863 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-12 [patent_title] => Imprint method [patent_app_type] => utility [patent_app_number] => 17/750421 [patent_app_country] => US [patent_app_date] => 2022-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 8089 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17750421 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19733715 [patent_doc_number] => 12211716 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-28 [patent_title] => Substrate processing apparatus and substrate processing method [patent_app_type] => utility [patent_app_number] => 17/664243 [patent_app_country] => US [patent_app_date] => 2022-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5245 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17664243 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19016298 [patent_doc_number] => 11923239 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-05 [patent_title] => Structures for radiofrequency applications and related methods [patent_app_type] => utility [patent_app_number] => 17/663898 [patent_app_country] => US [patent_app_date] => 2022-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 8140 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17663898 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19110211 [patent_doc_number] => 11963344 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-16 [patent_title] => Integrated circuit device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/744026 [patent_app_country] => US [patent_app_date] => 2022-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 44 [patent_no_of_words] => 9551 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17744026 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18334494 [patent_doc_number] => 20230126442 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-27 [patent_title] => Non-Conformal Gate Oxide Formation on FinFET [patent_app_type] => utility [patent_app_number] => 17/662532 [patent_app_country] => US [patent_app_date] => 2022-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8225 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17662532 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18124029 [patent_doc_number] => 20230009640 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-12 [patent_title] => BACKSIDE POWER RAIL FOR PHYSICAL FAILURE ANALYSIS (PFA) [patent_app_type] => utility [patent_app_number] => 17/738928 [patent_app_country] => US [patent_app_date] => 2022-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8566 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17738928 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19138003 [patent_doc_number] => 11972978 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-30 [patent_title] => Conductive via of integrated circuitry, memory array comprising strings of memory cells, method of forming a conductive via of integrated circuitry, and method of forming a memory array comprising strings of memory cells [patent_app_type] => utility [patent_app_number] => 17/736365 [patent_app_country] => US [patent_app_date] => 2022-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 21 [patent_no_of_words] => 7632 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17736365 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17810978 [patent_doc_number] => 20220262813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-18 [patent_title] => Integrated Assemblies Having Transistor Body Regions Coupled to Carrier-Sink-Structures; and Methods of Forming Integrated Assemblies [patent_app_type] => utility [patent_app_number] => 17/734410 [patent_app_country] => US [patent_app_date] => 2022-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9345 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17734410 [rel_patent_id] =>[rel_patent_doc_number] =>)