Search

Hsien Ming Lee

Examiner (ID: 17169, Phone: (571)272-1863 , Office: P/2823 )

Most Active Art Unit
2823
Art Unit(s)
2814, 2823
Total Applications
2377
Issued Applications
2182
Pending Applications
27
Abandoned Applications
178

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19973898 [patent_doc_number] => 12342531 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-24 [patent_title] => Integrated circuit device [patent_app_type] => utility [patent_app_number] => 17/734436 [patent_app_country] => US [patent_app_date] => 2022-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 4508 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17734436 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/734436
Integrated circuit device May 1, 2022 Issued
Array ( [id] => 19767398 [patent_doc_number] => 12225714 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-11 [patent_title] => Semiconductor structure and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/661065 [patent_app_country] => US [patent_app_date] => 2022-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 22 [patent_no_of_words] => 6196 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17661065 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/661065
Semiconductor structure and manufacturing method thereof Apr 27, 2022 Issued
Array ( [id] => 18639534 [patent_doc_number] => 11764155 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-19 [patent_title] => Cell structure with intermediate metal layers for power supplies [patent_app_type] => utility [patent_app_number] => 17/728007 [patent_app_country] => US [patent_app_date] => 2022-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5196 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17728007 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/728007
Cell structure with intermediate metal layers for power supplies Apr 24, 2022 Issued
Array ( [id] => 19919767 [patent_doc_number] => 12295163 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-06 [patent_title] => Formation of gate stacks comprising a threshold voltage tuning layer [patent_app_type] => utility [patent_app_number] => 17/660389 [patent_app_country] => US [patent_app_date] => 2022-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3780 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17660389 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/660389
Formation of gate stacks comprising a threshold voltage tuning layer Apr 21, 2022 Issued
Array ( [id] => 18969374 [patent_doc_number] => 11903186 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-13 [patent_title] => Method for manufacturing semiconductor device with bit line contacts of different pitches [patent_app_type] => utility [patent_app_number] => 17/726004 [patent_app_country] => US [patent_app_date] => 2022-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 10120 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17726004 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/726004
Method for manufacturing semiconductor device with bit line contacts of different pitches Apr 20, 2022 Issued
Array ( [id] => 18706462 [patent_doc_number] => 11792994 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-17 [patent_title] => Three-dimensional memory device including a string selection line gate electrode having a silicide layer [patent_app_type] => utility [patent_app_number] => 17/659990 [patent_app_country] => US [patent_app_date] => 2022-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 44 [patent_no_of_words] => 12070 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17659990 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/659990
Three-dimensional memory device including a string selection line gate electrode having a silicide layer Apr 19, 2022 Issued
Array ( [id] => 17764830 [patent_doc_number] => 20220238443 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-28 [patent_title] => SEMICONDUCTOR DEVICE, AND ASSOCIATED METHOD AND SYSTEM [patent_app_type] => utility [patent_app_number] => 17/721734 [patent_app_country] => US [patent_app_date] => 2022-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6592 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17721734 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/721734
Semiconductor device, and associated method and system Apr 14, 2022 Issued
Array ( [id] => 17780291 [patent_doc_number] => 20220246641 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-04 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/721096 [patent_app_country] => US [patent_app_date] => 2022-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8485 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17721096 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/721096
Semiconductor device and manufacturing method of the semiconductor device Apr 13, 2022 Issued
Array ( [id] => 18279974 [patent_doc_number] => 20230095446 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-30 [patent_title] => SEMICONDUCTOR DEVICE HAVING BURIED GATE STRUCTURE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/719939 [patent_app_country] => US [patent_app_date] => 2022-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9650 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17719939 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/719939
Semiconductor device having buried gate structure and method for fabricating the same Apr 12, 2022 Issued
Array ( [id] => 17764939 [patent_doc_number] => 20220238552 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-28 [patent_title] => THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/718676 [patent_app_country] => US [patent_app_date] => 2022-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8458 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17718676 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/718676
Three-dimensional semiconductor memory device Apr 11, 2022 Issued
Array ( [id] => 19765908 [patent_doc_number] => 12224209 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-11 [patent_title] => Semiconductor device and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/715967 [patent_app_country] => US [patent_app_date] => 2022-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 8315 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17715967 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/715967
Semiconductor device and manufacturing method thereof Apr 7, 2022 Issued
Array ( [id] => 18782190 [patent_doc_number] => 11823956 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-21 [patent_title] => Two-dimensional vertical fins [patent_app_type] => utility [patent_app_number] => 17/710364 [patent_app_country] => US [patent_app_date] => 2022-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6137 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17710364 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/710364
Two-dimensional vertical fins Mar 30, 2022 Issued
Array ( [id] => 18680144 [patent_doc_number] => 20230317802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => HIGH ASPECT RATIO CONTACT STRUCTURE WITH MULTIPLE METAL STACKS [patent_app_type] => utility [patent_app_number] => 17/657006 [patent_app_country] => US [patent_app_date] => 2022-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4839 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17657006 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/657006
High aspect ratio contact structure with multiple metal stacks Mar 28, 2022 Issued
Array ( [id] => 17723389 [patent_doc_number] => 20220216111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-07 [patent_title] => Semiconductor Device and Method [patent_app_type] => utility [patent_app_number] => 17/705943 [patent_app_country] => US [patent_app_date] => 2022-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11463 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17705943 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/705943
Semiconductor device and method Mar 27, 2022 Issued
Array ( [id] => 17738365 [patent_doc_number] => 20220223827 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => VAPOR-DEPOSITION MASK, METHOD FOR MANUFACTURING VAPOR-DEPOSITION MASK, AND METHOD FOR MANUFACTURING DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/706541 [patent_app_country] => US [patent_app_date] => 2022-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9355 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17706541 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/706541
Vapor-deposition mask, method for manufacturing vapor-deposition mask, and method for manufacturing display device Mar 27, 2022 Issued
Array ( [id] => 17723511 [patent_doc_number] => 20220216233 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-07 [patent_title] => METHOD OF FABRICATING A VERTICAL SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/702967 [patent_app_country] => US [patent_app_date] => 2022-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10415 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17702967 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/702967
Method of fabricating a vertical semiconductor device Mar 23, 2022 Issued
Array ( [id] => 17723331 [patent_doc_number] => 20220216053 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-07 [patent_title] => SEMICONDUCTOR-ON-INSULATOR (SOI) SUBSTRATE AND METHOD FOR FORMING [patent_app_type] => utility [patent_app_number] => 17/701103 [patent_app_country] => US [patent_app_date] => 2022-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10802 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17701103 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/701103
Semiconductor-on-insulator (SOI) substrate and method for forming Mar 21, 2022 Issued
Array ( [id] => 18655204 [patent_doc_number] => 20230301055 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-21 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE HAVING WORD LINE STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/700406 [patent_app_country] => US [patent_app_date] => 2022-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8915 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17700406 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/700406
Method of manufacturing semiconductor device having word line structure Mar 20, 2022 Issued
Array ( [id] => 19858220 [patent_doc_number] => 12261071 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-25 [patent_title] => Electronic component transfer apparatus, electronic component transfer method, and method of manufacturing a light-emitting diode panel [patent_app_type] => utility [patent_app_number] => 17/699168 [patent_app_country] => US [patent_app_date] => 2022-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 6253 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17699168 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/699168
Electronic component transfer apparatus, electronic component transfer method, and method of manufacturing a light-emitting diode panel Mar 19, 2022 Issued
Array ( [id] => 17692150 [patent_doc_number] => 20220199443 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => SUBSTRATE PROCESSING APPARATUS, ELEVATOR AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/691641 [patent_app_country] => US [patent_app_date] => 2022-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14185 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17691641 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/691641
Substrate processing apparatus, elevator and method of manufacturing semiconductor device Mar 9, 2022 Issued
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