
Hsien Ming Lee
Examiner (ID: 4536)
| Most Active Art Unit | 2823 |
| Art Unit(s) | 2823, 2814 |
| Total Applications | 2378 |
| Issued Applications | 2182 |
| Pending Applications | 28 |
| Abandoned Applications | 178 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 18462760
[patent_doc_number] => 11687047
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-06-27
[patent_title] => Quadratic program solver for MPC using variable ordering
[patent_app_type] => utility
[patent_app_number] => 17/487951
[patent_app_country] => US
[patent_app_date] => 2021-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 4301
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17487951
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/487951 | Quadratic program solver for MPC using variable ordering | Sep 27, 2021 | Issued |
Array
(
[id] => 19640469
[patent_doc_number] => 12171094
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-12-17
[patent_title] => Semiconductor structure, formation method thereof and memory
[patent_app_type] => utility
[patent_app_number] => 17/486696
[patent_app_country] => US
[patent_app_date] => 2021-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 26
[patent_no_of_words] => 6891
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17486696
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/486696 | Semiconductor structure, formation method thereof and memory | Sep 26, 2021 | Issued |
Array
(
[id] => 18447114
[patent_doc_number] => 11682690
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-06-20
[patent_title] => Image sensor and image capture device
[patent_app_type] => utility
[patent_app_number] => 17/484535
[patent_app_country] => US
[patent_app_date] => 2021-09-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 14213
[patent_no_of_claims] => 37
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 320
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17484535
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/484535 | Image sensor and image capture device | Sep 23, 2021 | Issued |
Array
(
[id] => 19314411
[patent_doc_number] => 12040236
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-07-16
[patent_title] => 3D devices with 3D diffusion breaks and method of forming the same
[patent_app_type] => utility
[patent_app_number] => 17/480336
[patent_app_country] => US
[patent_app_date] => 2021-09-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 37
[patent_no_of_words] => 10961
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17480336
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/480336 | 3D devices with 3D diffusion breaks and method of forming the same | Sep 20, 2021 | Issued |
Array
(
[id] => 17582976
[patent_doc_number] => 20220139831
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-05-05
[patent_title] => SEMICONDUCTOR DEVICE AND DATA STORAGE SYSTEM INCLUDING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/475128
[patent_app_country] => US
[patent_app_date] => 2021-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19210
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 236
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17475128
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/475128 | Semiconductor device and data storage system including the same | Sep 13, 2021 | Issued |
Array
(
[id] => 19885065
[patent_doc_number] => 12270768
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-04-08
[patent_title] => Method of processing a cleaved semiconductor wafer
[patent_app_type] => utility
[patent_app_number] => 17/447527
[patent_app_country] => US
[patent_app_date] => 2021-09-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 9554
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17447527
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/447527 | Method of processing a cleaved semiconductor wafer | Sep 12, 2021 | Issued |
Array
(
[id] => 19110221
[patent_doc_number] => 11963354
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-04-16
[patent_title] => Three-dimensional memory device with dielectric or semiconductor wall support structures and method of forming the same
[patent_app_type] => utility
[patent_app_number] => 17/467970
[patent_app_country] => US
[patent_app_date] => 2021-09-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 137
[patent_figures_cnt] => 140
[patent_no_of_words] => 30462
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17467970
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/467970 | Three-dimensional memory device with dielectric or semiconductor wall support structures and method of forming the same | Sep 6, 2021 | Issued |
Array
(
[id] => 17900847
[patent_doc_number] => 20220310509
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-29
[patent_title] => SEMICONDUCTOR STORAGE DEVICE AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/466807
[patent_app_country] => US
[patent_app_date] => 2021-09-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14385
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17466807
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/466807 | Semiconductor storage device and method for manufacturing the same | Sep 2, 2021 | Issued |
Array
(
[id] => 17303109
[patent_doc_number] => 20210398948
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-23
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/463650
[patent_app_country] => US
[patent_app_date] => 2021-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10739
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 201
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17463650
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/463650 | Semiconductor device and method of fabricating the same | Aug 31, 2021 | Issued |
Array
(
[id] => 17855228
[patent_doc_number] => 20220285271
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-08
[patent_title] => SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/412461
[patent_app_country] => US
[patent_app_date] => 2021-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8053
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 211
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17412461
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/412461 | Semiconductor memory device and method of manufacturing the same | Aug 25, 2021 | Issued |
Array
(
[id] => 18704809
[patent_doc_number] => 11791327
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-10-17
[patent_title] => Three-dimensional memory device having support-die-assisted source power distribution and method of making thereof
[patent_app_type] => utility
[patent_app_number] => 17/411635
[patent_app_country] => US
[patent_app_date] => 2021-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 56
[patent_figures_cnt] => 67
[patent_no_of_words] => 31515
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17411635
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/411635 | Three-dimensional memory device having support-die-assisted source power distribution and method of making thereof | Aug 24, 2021 | Issued |
Array
(
[id] => 17262939
[patent_doc_number] => 20210375924
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-02
[patent_title] => SEMICONDUCTOR MEMORY DEVICES
[patent_app_type] => utility
[patent_app_number] => 17/400224
[patent_app_country] => US
[patent_app_date] => 2021-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9833
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17400224
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/400224 | Semiconductor memory devices | Aug 11, 2021 | Issued |
Array
(
[id] => 18871021
[patent_doc_number] => 11858806
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-02
[patent_title] => Vertical shear weld wafer bonding
[patent_app_type] => utility
[patent_app_number] => 17/399832
[patent_app_country] => US
[patent_app_date] => 2021-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 11
[patent_no_of_words] => 5224
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 55
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17399832
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/399832 | Vertical shear weld wafer bonding | Aug 10, 2021 | Issued |
Array
(
[id] => 17246780
[patent_doc_number] => 20210366525
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-11-25
[patent_title] => Memory Arrays And Methods Used In Forming A Memory Array
[patent_app_type] => utility
[patent_app_number] => 17/397028
[patent_app_country] => US
[patent_app_date] => 2021-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6749
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -39
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17397028
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/397028 | Memory arrays and methods used in forming a memory array | Aug 8, 2021 | Issued |
Array
(
[id] => 17247451
[patent_doc_number] => 20210367196
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-11-25
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/396835
[patent_app_country] => US
[patent_app_date] => 2021-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11844
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -3
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17396835
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/396835 | Display device | Aug 8, 2021 | Issued |
Array
(
[id] => 18937213
[patent_doc_number] => 11889678
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-30
[patent_title] => Method of manufacturing buried word line structure and semiconductor memory thereof
[patent_app_type] => utility
[patent_app_number] => 17/444139
[patent_app_country] => US
[patent_app_date] => 2021-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 16
[patent_no_of_words] => 4922
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17444139
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/444139 | Method of manufacturing buried word line structure and semiconductor memory thereof | Jul 29, 2021 | Issued |
Array
(
[id] => 18166707
[patent_doc_number] => 20230033311
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-02-02
[patent_title] => MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/390727
[patent_app_country] => US
[patent_app_date] => 2021-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5109
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 164
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17390727
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/390727 | Memory device and manufacturing method thereof | Jul 29, 2021 | Issued |
Array
(
[id] => 18263183
[patent_doc_number] => 11610892
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-03-21
[patent_title] => Buried word line structure and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 17/389296
[patent_app_country] => US
[patent_app_date] => 2021-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2364
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 38
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17389296
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/389296 | Buried word line structure and manufacturing method thereof | Jul 28, 2021 | Issued |
Array
(
[id] => 18892762
[patent_doc_number] => 11871555
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-09
[patent_title] => Semiconductor structure and method for forming semiconductor structure
[patent_app_type] => utility
[patent_app_number] => 17/386485
[patent_app_country] => US
[patent_app_date] => 2021-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 4343
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 375
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17386485
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/386485 | Semiconductor structure and method for forming semiconductor structure | Jul 26, 2021 | Issued |
Array
(
[id] => 17203495
[patent_doc_number] => 20210343590
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-11-04
[patent_title] => Contact Conductive Feature Formation and Structure
[patent_app_type] => utility
[patent_app_number] => 17/372671
[patent_app_country] => US
[patent_app_date] => 2021-07-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5886
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17372671
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/372671 | Contact conductive feature formation and structure | Jul 11, 2021 | Issued |