Search

Hua Jasmine Song

Examiner (ID: 11195)

Most Active Art Unit
2133
Art Unit(s)
2189, 2131, 2138, 2187, 2188, 2133
Total Applications
1391
Issued Applications
1254
Pending Applications
70
Abandoned Applications
80

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10724510 [patent_doc_number] => 20160070658 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-10 [patent_title] => 'MULTI-LEVEL, HARDWARE-ENFORCED DOMAIN SEPARATION USING A SEPARATION KERNEL ON A MULTICORE PROCESSOR WITH A SHARED CACHE' [patent_app_type] => utility [patent_app_number] => 14/480456 [patent_app_country] => US [patent_app_date] => 2014-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3498 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14480456 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/480456
Multi-level, hardware-enforced domain separation using a separation kernel on a multicore processor with a shared cache Sep 7, 2014 Issued
Array ( [id] => 11775136 [patent_doc_number] => 09384064 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-05 [patent_title] => 'Multiple core processing with high throughput atomic memory operations' [patent_app_type] => utility [patent_app_number] => 14/475776 [patent_app_country] => US [patent_app_date] => 2014-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6346 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14475776 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/475776
Multiple core processing with high throughput atomic memory operations Sep 2, 2014 Issued
Array ( [id] => 10969655 [patent_doc_number] => 20140372688 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-18 [patent_title] => 'MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/475317 [patent_app_country] => US [patent_app_date] => 2014-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 15938 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14475317 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/475317
Memory system storing management information and method of controlling same Sep 1, 2014 Issued
Array ( [id] => 11787321 [patent_doc_number] => 09396775 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-19 [patent_title] => 'Semiconductor memory device including a control circuit and at least two memory cell arrays' [patent_app_type] => utility [patent_app_number] => 14/475493 [patent_app_country] => US [patent_app_date] => 2014-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 13422 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14475493 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/475493
Semiconductor memory device including a control circuit and at least two memory cell arrays Sep 1, 2014 Issued
Array ( [id] => 10524580 [patent_doc_number] => 09251095 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-02 [patent_title] => 'Providing metadata in a translation lookaside buffer (TLB)' [patent_app_type] => utility [patent_app_number] => 14/339756 [patent_app_country] => US [patent_app_date] => 2014-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3467 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14339756 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/339756
Providing metadata in a translation lookaside buffer (TLB) Jul 23, 2014 Issued
Array ( [id] => 11200168 [patent_doc_number] => 09430380 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-30 [patent_title] => 'Managing memory transactions in a distributed shared memory system supporting caching above a point of coherency' [patent_app_type] => utility [patent_app_number] => 14/312157 [patent_app_country] => US [patent_app_date] => 2014-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 13615 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14312157 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/312157
Managing memory transactions in a distributed shared memory system supporting caching above a point of coherency Jun 22, 2014 Issued
Array ( [id] => 10470991 [patent_doc_number] => 20150356007 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-10 [patent_title] => 'PARALLEL GARBAGE COLLECTION IMPLEMENTED IN HARDWARE' [patent_app_type] => utility [patent_app_number] => 14/298532 [patent_app_country] => US [patent_app_date] => 2014-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10753 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14298532 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/298532
Parallel garbage collection implemented in hardware Jun 5, 2014 Issued
Array ( [id] => 10962702 [patent_doc_number] => 20140365731 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-11 [patent_title] => 'Systems and Methods for Cache Management for Universal Serial Bus Systems' [patent_app_type] => utility [patent_app_number] => 14/297793 [patent_app_country] => US [patent_app_date] => 2014-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2362 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14297793 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/297793
Systems and methods for cache management for universal serial bus systems Jun 5, 2014 Issued
Array ( [id] => 10242894 [patent_doc_number] => 20150127888 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-07 [patent_title] => 'Data Storage Device and Error Correction Method Thereof' [patent_app_type] => utility [patent_app_number] => 14/298392 [patent_app_country] => US [patent_app_date] => 2014-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3574 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14298392 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/298392
Data storage device and error correction method thereof Jun 5, 2014 Issued
Array ( [id] => 10284238 [patent_doc_number] => 20150169236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-18 [patent_title] => 'SYSTEM AND METHOD FOR SUPPORTING MEMORY ALLOCATION CONTROL WITH PUSH-BACK IN A DISTRIBUTED DATA GRID' [patent_app_type] => utility [patent_app_number] => 14/298458 [patent_app_country] => US [patent_app_date] => 2014-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3448 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14298458 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/298458
System and method for supporting memory allocation control with push-back in a distributed data grid Jun 5, 2014 Issued
Array ( [id] => 10052494 [patent_doc_number] => 09092374 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-28 [patent_title] => 'Method of and system for enhanced data storage' [patent_app_type] => utility [patent_app_number] => 14/293675 [patent_app_country] => US [patent_app_date] => 2014-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6177 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14293675 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/293675
Method of and system for enhanced data storage Jun 1, 2014 Issued
Array ( [id] => 11186603 [patent_doc_number] => 09418007 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-16 [patent_title] => 'Managing memory transactions in a distributed shared memory system supporting caching above a point of coherency' [patent_app_type] => utility [patent_app_number] => 14/278005 [patent_app_country] => US [patent_app_date] => 2014-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 13561 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14278005 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/278005
Managing memory transactions in a distributed shared memory system supporting caching above a point of coherency May 14, 2014 Issued
Array ( [id] => 10446594 [patent_doc_number] => 20150331607 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-19 [patent_title] => 'SYSTEM AND METHOD FOR SIMULATING A PERSISTENT BYTE ADDRESSABLE STORAGE DEVICE ON A PERSISTENT BLOCK ADDRESSABLE STORAGE DEVICE' [patent_app_type] => utility [patent_app_number] => 14/277988 [patent_app_country] => US [patent_app_date] => 2014-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7998 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14277988 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/277988
System and method for simulating a persistent byte addressable storage device on a persistent block addressable storage device May 14, 2014 Issued
Array ( [id] => 11816651 [patent_doc_number] => 09720600 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-01 [patent_title] => 'Apparatus and method for transferring data between storages having different access speeds' [patent_app_type] => utility [patent_app_number] => 14/278487 [patent_app_country] => US [patent_app_date] => 2014-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 8019 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14278487 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/278487
Apparatus and method for transferring data between storages having different access speeds May 14, 2014 Issued
Array ( [id] => 10446608 [patent_doc_number] => 20150331622 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-19 [patent_title] => 'MANAGEMENT OF SERVER CACHE STORAGE SPACE' [patent_app_type] => utility [patent_app_number] => 14/277154 [patent_app_country] => US [patent_app_date] => 2014-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7076 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14277154 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/277154
Management of server cache storage space May 13, 2014 Issued
Array ( [id] => 10446618 [patent_doc_number] => 20150331632 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-19 [patent_title] => 'MANAGING ARCHIVAL STORAGE' [patent_app_type] => utility [patent_app_number] => 14/276851 [patent_app_country] => US [patent_app_date] => 2014-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 19886 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14276851 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/276851
Managing archival storage May 12, 2014 Issued
Array ( [id] => 9644975 [patent_doc_number] => 20140223088 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-07 [patent_title] => 'INFORMATION PROCESSING DEVICE, EXTERNAL STORAGE DEVICE, HOST DEVICE, RELAY DEVICE, CONTROL PROGRAM, AND CONTROL METHOD OF INFORMATION PROCESSING DEVICE' [patent_app_type] => utility [patent_app_number] => 14/251285 [patent_app_country] => US [patent_app_date] => 2014-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 27007 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14251285 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/251285
Information processing device, external storage device, host device, relay device, control program, and control method of information processing device Apr 10, 2014 Issued
Array ( [id] => 12146917 [patent_doc_number] => 09881169 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-30 [patent_title] => 'Malware-proof data processing system' [patent_app_type] => utility [patent_app_number] => 14/783303 [patent_app_country] => US [patent_app_date] => 2014-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5312 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 319 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14783303 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/783303
Malware-proof data processing system Mar 26, 2014 Issued
Array ( [id] => 9954352 [patent_doc_number] => 09003164 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-07 [patent_title] => 'Providing hardware support for shared virtual memory between local and remote physical memory' [patent_app_type] => utility [patent_app_number] => 14/221741 [patent_app_country] => US [patent_app_date] => 2014-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6942 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14221741 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/221741
Providing hardware support for shared virtual memory between local and remote physical memory Mar 20, 2014 Issued
Array ( [id] => 10137423 [patent_doc_number] => 09170742 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-27 [patent_title] => 'Techniques for reducing memory write operations using coalescing memory buffers and difference information' [patent_app_type] => utility [patent_app_number] => 14/201020 [patent_app_country] => US [patent_app_date] => 2014-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8419 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14201020 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/201020
Techniques for reducing memory write operations using coalescing memory buffers and difference information Mar 6, 2014 Issued
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