Search

Hua Jasmine Song

Examiner (ID: 6964, Phone: (571)272-4213 , Office: P/2133 )

Most Active Art Unit
2133
Art Unit(s)
2131, 2189, 2187, 2138, 2133, 2188
Total Applications
1393
Issued Applications
1256
Pending Applications
72
Abandoned Applications
80

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3759797 [patent_doc_number] => 05851863 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-22 [patent_title] => 'Semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/629248 [patent_app_country] => US [patent_app_date] => 1996-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 29 [patent_no_of_words] => 8619 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/851/05851863.pdf [firstpage_image] =>[orig_patent_app_number] => 629248 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/629248
Semiconductor device Apr 7, 1996 Issued
Array ( [id] => 3957482 [patent_doc_number] => 05930639 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-27 [patent_title] => 'Method for precision etching of platinum electrodes' [patent_app_type] => 1 [patent_app_number] => 8/631290 [patent_app_country] => US [patent_app_date] => 1996-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 5389 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/930/05930639.pdf [firstpage_image] =>[orig_patent_app_number] => 631290 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/631290
Method for precision etching of platinum electrodes Apr 7, 1996 Issued
Array ( [id] => 3647143 [patent_doc_number] => 05629233 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-13 [patent_title] => 'Method of making III/V semiconductor lasers' [patent_app_type] => 1 [patent_app_number] => 8/627562 [patent_app_country] => US [patent_app_date] => 1996-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2162 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 304 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/629/05629233.pdf [firstpage_image] =>[orig_patent_app_number] => 627562 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/627562
Method of making III/V semiconductor lasers Apr 3, 1996 Issued
Array ( [id] => 3847407 [patent_doc_number] => 05719066 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-17 [patent_title] => 'Method of manufacturing a semiconductor integrated circuit apparatus having a mis-type condenser' [patent_app_type] => 1 [patent_app_number] => 8/625284 [patent_app_country] => US [patent_app_date] => 1996-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 23 [patent_no_of_words] => 11770 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 480 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/719/05719066.pdf [firstpage_image] =>[orig_patent_app_number] => 625284 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/625284
Method of manufacturing a semiconductor integrated circuit apparatus having a mis-type condenser Mar 31, 1996 Issued
Array ( [id] => 3885430 [patent_doc_number] => 05723378 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-03 [patent_title] => 'Fabrication method of semiconductor device using epitaxial growth process' [patent_app_type] => 1 [patent_app_number] => 8/620122 [patent_app_country] => US [patent_app_date] => 1996-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 28 [patent_no_of_words] => 7902 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/723/05723378.pdf [firstpage_image] =>[orig_patent_app_number] => 620122 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/620122
Fabrication method of semiconductor device using epitaxial growth process Mar 30, 1996 Issued
Array ( [id] => 3739401 [patent_doc_number] => 05753556 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-19 [patent_title] => 'Method of fabricating a MIS transistor' [patent_app_type] => 1 [patent_app_number] => 8/623837 [patent_app_country] => US [patent_app_date] => 1996-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 34 [patent_no_of_words] => 9101 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/753/05753556.pdf [firstpage_image] =>[orig_patent_app_number] => 623837 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/623837
Method of fabricating a MIS transistor Mar 28, 1996 Issued
Array ( [id] => 3660499 [patent_doc_number] => 05656536 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-12 [patent_title] => 'Method of manufacturing a crown shaped capacitor with horizontal fins for high density DRAMs' [patent_app_type] => 1 [patent_app_number] => 8/623678 [patent_app_country] => US [patent_app_date] => 1996-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 2198 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/656/05656536.pdf [firstpage_image] =>[orig_patent_app_number] => 623678 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/623678
Method of manufacturing a crown shaped capacitor with horizontal fins for high density DRAMs Mar 28, 1996 Issued
Array ( [id] => 4070247 [patent_doc_number] => 05970332 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-19 [patent_title] => 'Method of manufacturing a semiconductor device with a BiCMOS circuit' [patent_app_type] => 1 [patent_app_number] => 8/623384 [patent_app_country] => US [patent_app_date] => 1996-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 3742 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/970/05970332.pdf [firstpage_image] =>[orig_patent_app_number] => 623384 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/623384
Method of manufacturing a semiconductor device with a BiCMOS circuit Mar 26, 1996 Issued
Array ( [id] => 3619615 [patent_doc_number] => 05614425 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-25 [patent_title] => 'Method of fabricating a bipolar transistor operable at high speed' [patent_app_type] => 1 [patent_app_number] => 8/622270 [patent_app_country] => US [patent_app_date] => 1996-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 3854 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/614/05614425.pdf [firstpage_image] =>[orig_patent_app_number] => 622270 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/622270
Method of fabricating a bipolar transistor operable at high speed Mar 26, 1996 Issued
Array ( [id] => 3831795 [patent_doc_number] => 05712174 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-27 [patent_title] => 'Method of manufacturing a bipolar transistor' [patent_app_type] => 1 [patent_app_number] => 8/618115 [patent_app_country] => US [patent_app_date] => 1996-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 51 [patent_figures_cnt] => 86 [patent_no_of_words] => 20793 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/712/05712174.pdf [firstpage_image] =>[orig_patent_app_number] => 618115 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/618115
Method of manufacturing a bipolar transistor Mar 18, 1996 Issued
Array ( [id] => 3621356 [patent_doc_number] => 05593914 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-14 [patent_title] => 'Method for constructing ferroelectric capacitor-like structures on silicon dioxide surfaces' [patent_app_type] => 1 [patent_app_number] => 8/616526 [patent_app_country] => US [patent_app_date] => 1996-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 3170 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/593/05593914.pdf [firstpage_image] =>[orig_patent_app_number] => 616526 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/616526
Method for constructing ferroelectric capacitor-like structures on silicon dioxide surfaces Mar 18, 1996 Issued
Array ( [id] => 3826364 [patent_doc_number] => 05759902 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-02 [patent_title] => 'Method of making an integrated circuit with complementary junction-isolated bipolar transistors' [patent_app_type] => 1 [patent_app_number] => 8/616973 [patent_app_country] => US [patent_app_date] => 1996-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 7 [patent_no_of_words] => 2268 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/759/05759902.pdf [firstpage_image] =>[orig_patent_app_number] => 616973 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/616973
Method of making an integrated circuit with complementary junction-isolated bipolar transistors Mar 17, 1996 Issued
Array ( [id] => 3701178 [patent_doc_number] => 05674773 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-07 [patent_title] => 'Method for planarizing high step-height integrated circuit structures' [patent_app_type] => 1 [patent_app_number] => 8/616897 [patent_app_country] => US [patent_app_date] => 1996-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 5057 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/674/05674773.pdf [firstpage_image] =>[orig_patent_app_number] => 616897 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/616897
Method for planarizing high step-height integrated circuit structures Mar 14, 1996 Issued
Array ( [id] => 4056680 [patent_doc_number] => 05863807 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-26 [patent_title] => 'Manufacturing method of a semiconductor integrated circuit' [patent_app_type] => 1 [patent_app_number] => 8/616896 [patent_app_country] => US [patent_app_date] => 1996-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1101 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/863/05863807.pdf [firstpage_image] =>[orig_patent_app_number] => 616896 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/616896
Manufacturing method of a semiconductor integrated circuit Mar 14, 1996 Issued
Array ( [id] => 3632955 [patent_doc_number] => 05610097 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-11 [patent_title] => 'Method for forming electrode on semiconductor' [patent_app_type] => 1 [patent_app_number] => 8/615106 [patent_app_country] => US [patent_app_date] => 1996-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2909 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/610/05610097.pdf [firstpage_image] =>[orig_patent_app_number] => 615106 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/615106
Method for forming electrode on semiconductor Mar 13, 1996 Issued
Array ( [id] => 3734708 [patent_doc_number] => 05698472 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-16 [patent_title] => 'Method and a device for oxidation of a semiconductor layer of SIC' [patent_app_type] => 1 [patent_app_number] => 8/612484 [patent_app_country] => US [patent_app_date] => 1996-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 2970 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/698/05698472.pdf [firstpage_image] =>[orig_patent_app_number] => 612484 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/612484
Method and a device for oxidation of a semiconductor layer of SIC Mar 6, 1996 Issued
Array ( [id] => 3660345 [patent_doc_number] => 05648298 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-15 [patent_title] => 'Methods for forming a contact in a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/610718 [patent_app_country] => US [patent_app_date] => 1996-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 3607 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/648/05648298.pdf [firstpage_image] =>[orig_patent_app_number] => 610718 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/610718
Methods for forming a contact in a semiconductor device Mar 3, 1996 Issued
Array ( [id] => 3660487 [patent_doc_number] => 05656535 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-12 [patent_title] => 'Storage node process for deep trench-based DRAM' [patent_app_type] => 1 [patent_app_number] => 8/610912 [patent_app_country] => US [patent_app_date] => 1996-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 2509 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/656/05656535.pdf [firstpage_image] =>[orig_patent_app_number] => 610912 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/610912
Storage node process for deep trench-based DRAM Mar 3, 1996 Issued
Array ( [id] => 3953018 [patent_doc_number] => 05940713 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-17 [patent_title] => 'Method for constructing multiple container capacitor' [patent_app_type] => 1 [patent_app_number] => 8/609360 [patent_app_country] => US [patent_app_date] => 1996-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4753 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/940/05940713.pdf [firstpage_image] =>[orig_patent_app_number] => 609360 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/609360
Method for constructing multiple container capacitor Feb 29, 1996 Issued
Array ( [id] => 3872854 [patent_doc_number] => 05824565 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-20 [patent_title] => 'Method of fabricating a sensor' [patent_app_type] => 1 [patent_app_number] => 8/608790 [patent_app_country] => US [patent_app_date] => 1996-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 4085 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/824/05824565.pdf [firstpage_image] =>[orig_patent_app_number] => 608790 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/608790
Method of fabricating a sensor Feb 28, 1996 Issued
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