Search

Hua Jasmine Song

Examiner (ID: 6964, Phone: (571)272-4213 , Office: P/2133 )

Most Active Art Unit
2133
Art Unit(s)
2131, 2189, 2187, 2138, 2133, 2188
Total Applications
1393
Issued Applications
1256
Pending Applications
72
Abandoned Applications
80

Applications

Application numberTitle of the applicationFiling DateStatus
08/587166 SEMICONDUCTOR LIGHT-EMITTING DEVICE AND METHOD FOR MANUFACTURING THEREOF Jan 15, 1996 Abandoned
Array ( [id] => 3619600 [patent_doc_number] => 05614424 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-25 [patent_title] => 'Method for fabricating an accumulated-base bipolar junction transistor' [patent_app_type] => 1 [patent_app_number] => 8/586522 [patent_app_country] => US [patent_app_date] => 1996-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 2382 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/614/05614424.pdf [firstpage_image] =>[orig_patent_app_number] => 586522 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/586522
Method for fabricating an accumulated-base bipolar junction transistor Jan 15, 1996 Issued
Array ( [id] => 4209498 [patent_doc_number] => RE036786 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-18 [patent_title] => 'Process to manufacture crown stacked capacitor structures with HSG-rugged polysilicon on all sides of the storage node' [patent_app_type] => 2 [patent_app_number] => 8/585402 [patent_app_country] => US [patent_app_date] => 1996-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 2843 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/036/RE036786.pdf [firstpage_image] =>[orig_patent_app_number] => 585402 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/585402
Process to manufacture crown stacked capacitor structures with HSG-rugged polysilicon on all sides of the storage node Jan 10, 1996 Issued
Array ( [id] => 3881841 [patent_doc_number] => 05798297 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-25 [patent_title] => 'Method for producing a semiconductor component with electrical connection terminals for high integration density' [patent_app_type] => 1 [patent_app_number] => 8/545648 [patent_app_country] => US [patent_app_date] => 1996-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2543 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/798/05798297.pdf [firstpage_image] =>[orig_patent_app_number] => 545648 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/545648
Method for producing a semiconductor component with electrical connection terminals for high integration density Jan 1, 1996 Issued
Array ( [id] => 6063616 [patent_doc_number] => 20020031901 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-03-14 [patent_title] => 'CONTACT AND VIA FABRICATION TECHNOLOGIES' [patent_app_type] => new [patent_app_number] => 08/580532 [patent_app_country] => US [patent_app_date] => 1995-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4552 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20020031901.pdf [firstpage_image] =>[orig_patent_app_number] => 08580532 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/580532
Contact and via fabrication technologies Dec 28, 1995 Issued
Array ( [id] => 3804600 [patent_doc_number] => 05830793 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-03 [patent_title] => 'Method of selective texfturing for patterned polysilicon electrodes' [patent_app_type] => 1 [patent_app_number] => 8/579238 [patent_app_country] => US [patent_app_date] => 1995-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2575 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/830/05830793.pdf [firstpage_image] =>[orig_patent_app_number] => 579238 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/579238
Method of selective texfturing for patterned polysilicon electrodes Dec 27, 1995 Issued
Array ( [id] => 3832210 [patent_doc_number] => 05712202 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-27 [patent_title] => 'Method for fabricating a multiple walled crown capacitor of a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/578928 [patent_app_country] => US [patent_app_date] => 1995-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 6480 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 394 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/712/05712202.pdf [firstpage_image] =>[orig_patent_app_number] => 578928 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/578928
Method for fabricating a multiple walled crown capacitor of a semiconductor device Dec 26, 1995 Issued
Array ( [id] => 3660994 [patent_doc_number] => 05624858 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-29 [patent_title] => 'Method of manufacturing a semiconductor device with increased breakdown voltage' [patent_app_type] => 1 [patent_app_number] => 8/576384 [patent_app_country] => US [patent_app_date] => 1995-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 43 [patent_no_of_words] => 8357 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/624/05624858.pdf [firstpage_image] =>[orig_patent_app_number] => 576384 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/576384
Method of manufacturing a semiconductor device with increased breakdown voltage Dec 20, 1995 Issued
Array ( [id] => 4023831 [patent_doc_number] => 05882968 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-16 [patent_title] => 'Semiconductor device fabrication method' [patent_app_type] => 1 [patent_app_number] => 8/576752 [patent_app_country] => US [patent_app_date] => 1995-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 105 [patent_no_of_words] => 5868 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/882/05882968.pdf [firstpage_image] =>[orig_patent_app_number] => 576752 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/576752
Semiconductor device fabrication method Dec 20, 1995 Issued
Array ( [id] => 4016720 [patent_doc_number] => 05924002 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-13 [patent_title] => 'Method of manufacturing a semiconductor device having ohmic electrode' [patent_app_type] => 1 [patent_app_number] => 8/575074 [patent_app_country] => US [patent_app_date] => 1995-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3701 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/924/05924002.pdf [firstpage_image] =>[orig_patent_app_number] => 575074 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/575074
Method of manufacturing a semiconductor device having ohmic electrode Dec 18, 1995 Issued
Array ( [id] => 3509530 [patent_doc_number] => 05587328 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-24 [patent_title] => 'Method for manufacturing semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/572876 [patent_app_country] => US [patent_app_date] => 1995-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 2172 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/587/05587328.pdf [firstpage_image] =>[orig_patent_app_number] => 572876 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/572876
Method for manufacturing semiconductor device Dec 17, 1995 Issued
Array ( [id] => 3515329 [patent_doc_number] => 05576242 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-19 [patent_title] => 'Method of forming self-aligned buried contact' [patent_app_type] => 1 [patent_app_number] => 8/573962 [patent_app_country] => US [patent_app_date] => 1995-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 20 [patent_no_of_words] => 1343 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/576/05576242.pdf [firstpage_image] =>[orig_patent_app_number] => 573962 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/573962
Method of forming self-aligned buried contact Dec 14, 1995 Issued
Array ( [id] => 1535981 [patent_doc_number] => 06337229 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-08 [patent_title] => 'Method of making crystal silicon semiconductor and thin film transistor' [patent_app_type] => B1 [patent_app_number] => 08/572008 [patent_app_country] => US [patent_app_date] => 1995-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 21 [patent_no_of_words] => 7327 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/337/06337229.pdf [firstpage_image] =>[orig_patent_app_number] => 08572008 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/572008
Method of making crystal silicon semiconductor and thin film transistor Dec 13, 1995 Issued
Array ( [id] => 3847448 [patent_doc_number] => 05719069 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-17 [patent_title] => 'One-chip integrated sensor process' [patent_app_type] => 1 [patent_app_number] => 8/571627 [patent_app_country] => US [patent_app_date] => 1995-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 5818 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/719/05719069.pdf [firstpage_image] =>[orig_patent_app_number] => 571627 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/571627
One-chip integrated sensor process Dec 12, 1995 Issued
Array ( [id] => 3725627 [patent_doc_number] => 05700731 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-23 [patent_title] => 'Method for manufacturing crown-shaped storage capacitors on dynamic random access memory cells' [patent_app_type] => 1 [patent_app_number] => 8/568722 [patent_app_country] => US [patent_app_date] => 1995-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 5837 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 355 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/700/05700731.pdf [firstpage_image] =>[orig_patent_app_number] => 568722 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/568722
Method for manufacturing crown-shaped storage capacitors on dynamic random access memory cells Dec 6, 1995 Issued
Array ( [id] => 3867680 [patent_doc_number] => 05837592 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-17 [patent_title] => 'Method for stabilizing polysilicon resistors' [patent_app_type] => 1 [patent_app_number] => 8/568712 [patent_app_country] => US [patent_app_date] => 1995-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4689 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/837/05837592.pdf [firstpage_image] =>[orig_patent_app_number] => 568712 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/568712
Method for stabilizing polysilicon resistors Dec 6, 1995 Issued
Array ( [id] => 3742714 [patent_doc_number] => 05801079 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-01 [patent_title] => 'Method for manufacturing a stacked capacitor type semiconductor memory device with good flatness characteristics' [patent_app_type] => 1 [patent_app_number] => 8/569006 [patent_app_country] => US [patent_app_date] => 1995-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 53 [patent_no_of_words] => 5414 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/801/05801079.pdf [firstpage_image] =>[orig_patent_app_number] => 569006 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/569006
Method for manufacturing a stacked capacitor type semiconductor memory device with good flatness characteristics Dec 6, 1995 Issued
Array ( [id] => 3608034 [patent_doc_number] => 05589416 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-31 [patent_title] => 'Process for forming integrated capacitors' [patent_app_type] => 1 [patent_app_number] => 8/568040 [patent_app_country] => US [patent_app_date] => 1995-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 11 [patent_no_of_words] => 1471 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 256 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/589/05589416.pdf [firstpage_image] =>[orig_patent_app_number] => 568040 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/568040
Process for forming integrated capacitors Dec 5, 1995 Issued
08/569355 METHOD OF REFLOWING A SEMICONDUCTOR DEVICE Dec 5, 1995 Abandoned
Array ( [id] => 3744996 [patent_doc_number] => 05716866 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-10 [patent_title] => 'Method of forming a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/566320 [patent_app_country] => US [patent_app_date] => 1995-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 5106 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/716/05716866.pdf [firstpage_image] =>[orig_patent_app_number] => 566320 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/566320
Method of forming a semiconductor device Nov 30, 1995 Issued
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