
Hua Jasmine Song
Examiner (ID: 6964, Phone: (571)272-4213 , Office: P/2133 )
| Most Active Art Unit | 2133 |
| Art Unit(s) | 2131, 2189, 2187, 2138, 2133, 2188 |
| Total Applications | 1393 |
| Issued Applications | 1256 |
| Pending Applications | 72 |
| Abandoned Applications | 80 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3714820
[patent_doc_number] => 05616509
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-01
[patent_title] => 'Method for fabricating a semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/534944
[patent_app_country] => US
[patent_app_date] => 1995-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 21
[patent_no_of_words] => 3274
[patent_no_of_claims] => 10
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[patent_words_short_claim] => 229
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/616/05616509.pdf
[firstpage_image] =>[orig_patent_app_number] => 534944
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/534944 | Method for fabricating a semiconductor device | Sep 27, 1995 | Issued |
Array
(
[id] => 3885474
[patent_doc_number] => 05723381
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-03
[patent_title] => 'Formation of self-aligned overlapping bitline contacts with sacrificial polysilicon fill-in stud'
[patent_app_type] => 1
[patent_app_number] => 8/534776
[patent_app_country] => US
[patent_app_date] => 1995-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 2955
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[pdf_file] => patents/05/723/05723381.pdf
[firstpage_image] =>[orig_patent_app_number] => 534776
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/534776 | Formation of self-aligned overlapping bitline contacts with sacrificial polysilicon fill-in stud | Sep 26, 1995 | Issued |
Array
(
[id] => 3660096
[patent_doc_number] => 05648280
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-07-15
[patent_title] => 'Method for fabricating a bipolar transistor with a base layer having an extremely low resistance'
[patent_app_type] => 1
[patent_app_number] => 8/533850
[patent_app_country] => US
[patent_app_date] => 1995-09-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[patent_no_of_words] => 8114
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[patent_words_short_claim] => 253
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[pdf_file] => patents/05/648/05648280.pdf
[firstpage_image] =>[orig_patent_app_number] => 533850
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/533850 | Method for fabricating a bipolar transistor with a base layer having an extremely low resistance | Sep 25, 1995 | Issued |
Array
(
[id] => 3999439
[patent_doc_number] => 05950083
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-09-07
[patent_title] => 'Method for fabricating CMOS transistor with self-aligned silicide (salicide) structure'
[patent_app_type] => 1
[patent_app_number] => 8/533162
[patent_app_country] => US
[patent_app_date] => 1995-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 18
[patent_no_of_words] => 6372
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[pdf_file] => patents/05/950/05950083.pdf
[firstpage_image] =>[orig_patent_app_number] => 533162
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/533162 | Method for fabricating CMOS transistor with self-aligned silicide (salicide) structure | Sep 24, 1995 | Issued |
Array
(
[id] => 3624810
[patent_doc_number] => 05620908
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-15
[patent_title] => 'Manufacturing method of semiconductor device comprising BiCMOS transistor'
[patent_app_type] => 1
[patent_app_number] => 8/530578
[patent_app_country] => US
[patent_app_date] => 1995-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
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[patent_no_of_words] => 11287
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[pdf_file] => patents/05/620/05620908.pdf
[firstpage_image] =>[orig_patent_app_number] => 530578
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/530578 | Manufacturing method of semiconductor device comprising BiCMOS transistor | Sep 18, 1995 | Issued |
Array
(
[id] => 3687353
[patent_doc_number] => 05691219
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-25
[patent_title] => 'Method of manufacturing a semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 8/527581
[patent_app_country] => US
[patent_app_date] => 1995-09-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[pdf_file] => patents/05/691/05691219.pdf
[firstpage_image] =>[orig_patent_app_number] => 527581
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/527581 | Method of manufacturing a semiconductor memory device | Sep 12, 1995 | Issued |
Array
(
[id] => 3869672
[patent_doc_number] => 05763291
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-09
[patent_title] => 'Method of making semiconductor laser'
[patent_app_type] => 1
[patent_app_number] => 8/523513
[patent_app_country] => US
[patent_app_date] => 1995-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 35
[patent_no_of_words] => 9697
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 141
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/763/05763291.pdf
[firstpage_image] =>[orig_patent_app_number] => 523513
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/523513 | Method of making semiconductor laser | Aug 31, 1995 | Issued |
Array
(
[id] => 3620615
[patent_doc_number] => 05641709
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-06-24
[patent_title] => 'Method of manufacturing a conductive micro bridge'
[patent_app_type] => 1
[patent_app_number] => 8/520806
[patent_app_country] => US
[patent_app_date] => 1995-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 15
[patent_no_of_words] => 2829
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 53
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/641/05641709.pdf
[firstpage_image] =>[orig_patent_app_number] => 520806
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/520806 | Method of manufacturing a conductive micro bridge | Aug 29, 1995 | Issued |
| 08/521504 | METHOD OF FORMING A UNILATERAL, GRADED-CHANNEL SEMICONDUCTOR DEVICE USING A GATE ELECTRODE DISPOSABLE SPACER | Aug 29, 1995 | Abandoned |
Array
(
[id] => 3695734
[patent_doc_number] => 05595933
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-21
[patent_title] => 'Method for manufacturing a cathode'
[patent_app_type] => 1
[patent_app_number] => 8/520444
[patent_app_country] => US
[patent_app_date] => 1995-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[patent_no_of_words] => 2156
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[pdf_file] => patents/05/595/05595933.pdf
[firstpage_image] =>[orig_patent_app_number] => 520444
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/520444 | Method for manufacturing a cathode | Aug 28, 1995 | Issued |
Array
(
[id] => 3646943
[patent_doc_number] => 05629219
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-05-13
[patent_title] => 'Method for making a complementary bipolar transistor'
[patent_app_type] => 1
[patent_app_number] => 8/520704
[patent_app_country] => US
[patent_app_date] => 1995-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
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[pdf_file] => patents/05/629/05629219.pdf
[firstpage_image] =>[orig_patent_app_number] => 520704
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/520704 | Method for making a complementary bipolar transistor | Aug 28, 1995 | Issued |
Array
(
[id] => 3656573
[patent_doc_number] => 05658818
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-08-19
[patent_title] => 'Semiconductor processing method employing an angled sidewall'
[patent_app_type] => 1
[patent_app_number] => 8/516973
[patent_app_country] => US
[patent_app_date] => 1995-08-18
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/658/05658818.pdf
[firstpage_image] =>[orig_patent_app_number] => 516973
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/516973 | Semiconductor processing method employing an angled sidewall | Aug 17, 1995 | Issued |
Array
(
[id] => 3664418
[patent_doc_number] => 05597744
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-28
[patent_title] => 'Method of producing a silicon carbide semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/516298
[patent_app_country] => US
[patent_app_date] => 1995-08-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[pdf_file] => patents/05/597/05597744.pdf
[firstpage_image] =>[orig_patent_app_number] => 516298
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/516298 | Method of producing a silicon carbide semiconductor device | Aug 16, 1995 | Issued |
| 08/513730 | CONTAINER CAPACITOR WITH INCREASED SURFACE AREA AND METHOD FOR MAKING SAME | Aug 10, 1995 | Abandoned |
Array
(
[id] => 3588824
[patent_doc_number] => 05585302
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-12-17
[patent_title] => 'Formation of polysilicon resistors in the tungsten strapped source/drain/gate process'
[patent_app_type] => 1
[patent_app_number] => 8/513404
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[patent_app_date] => 1995-08-10
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[pdf_file] => patents/05/585/05585302.pdf
[firstpage_image] =>[orig_patent_app_number] => 513404
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/513404 | Formation of polysilicon resistors in the tungsten strapped source/drain/gate process | Aug 9, 1995 | Issued |
Array
(
[id] => 3587347
[patent_doc_number] => 05550080
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-08-27
[patent_title] => 'Method for fabricating capacitors of semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/510174
[patent_app_country] => US
[patent_app_date] => 1995-08-02
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[pdf_file] => patents/05/550/05550080.pdf
[firstpage_image] =>[orig_patent_app_number] => 510174
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Array
(
[id] => 3926098
[patent_doc_number] => 05877063
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[patent_kind] => NA
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[patent_title] => 'Method of forming rough polysilicon surfaces'
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[firstpage_image] =>[orig_patent_app_number] => 502906
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/502906 | Method of forming rough polysilicon surfaces | Jul 16, 1995 | Issued |
Array
(
[id] => 3726658
[patent_doc_number] => 05670385
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-09-23
[patent_title] => 'Method for fabricating an optical controlled resonant tunneling oscillator'
[patent_app_type] => 1
[patent_app_number] => 8/501874
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[patent_app_date] => 1995-07-13
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[pdf_file] => patents/05/670/05670385.pdf
[firstpage_image] =>[orig_patent_app_number] => 501874
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/501874 | Method for fabricating an optical controlled resonant tunneling oscillator | Jul 12, 1995 | Issued |
Array
(
[id] => 3645791
[patent_doc_number] => 05637516
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[patent_kind] => NA
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[patent_title] => 'Method for producing MOS transistors and bipolar transistors on the same semiconductor wafer'
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[firstpage_image] =>[orig_patent_app_number] => 501358
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Array
(
[id] => 3585948
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[pdf_file] => patents/05/552/05552331.pdf
[firstpage_image] =>[orig_patent_app_number] => 500648
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/500648 | Process for self-aligned source for high density memory | Jul 10, 1995 | Issued |