| Application number | Title of the application | Filing Date | Status |
|---|
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Array
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[patent_doc_number] => 05698459
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[patent_kind] => NA
[patent_issue_date] => 1997-12-16
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Array
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[id] => 3692909
[patent_doc_number] => 05679587
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-10-21
[patent_title] => 'Method of fabricating an integrated circuit with vertical bipolar power transistors and isolated lateral bipolar control transistors'
[patent_app_type] => 1
[patent_app_number] => 8/455492
[patent_app_country] => US
[patent_app_date] => 1995-05-31
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[firstpage_image] =>[orig_patent_app_number] => 455492
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/455492 | Method of fabricating an integrated circuit with vertical bipolar power transistors and isolated lateral bipolar control transistors | May 30, 1995 | Issued |
| 08/453708 | METHOD FOR MANUFACTURING A BIPOLAR JUNCTION TRANSISTOR HAVING A POLYSILICON EMITTER | May 29, 1995 | Abandoned |
Array
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[patent_kind] => NA
[patent_issue_date] => 1997-01-07
[patent_title] => 'Semiconductor integrated circuit device with self-aligned superhigh speed bipolar transistor'
[patent_app_type] => 1
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Array
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Array
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[patent_issue_date] => 1996-01-16
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[firstpage_image] =>[orig_patent_app_number] => 450418
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Array
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[id] => 3521941
[patent_doc_number] => 05489546
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[patent_kind] => NA
[patent_issue_date] => 1996-02-06
[patent_title] => 'Method of forming CMOS devices using independent thickness spacers in a split-polysilicon DRAM process'
[patent_app_type] => 1
[patent_app_number] => 8/449300
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/449300 | Method of forming CMOS devices using independent thickness spacers in a split-polysilicon DRAM process | May 23, 1995 | Issued |
| 08/447490 | MULTI-STAGE SEMICONDUCTOR CAVITY FILLING PROCESS | May 22, 1995 | Abandoned |
Array
(
[id] => 3601635
[patent_doc_number] => 05578523
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[patent_issue_date] => 1996-11-26
[patent_title] => 'Method for forming inlaid interconnects in a semiconductor device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/444184 | Method for forming inlaid interconnects in a semiconductor device | May 17, 1995 | Issued |
| 08/442445 | METHOD FOR MANUFACTURING A CAPACITOR FOR A SEMICONDUCTOR DEVICE | May 15, 1995 | Abandoned |
Array
(
[id] => 3664387
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[patent_issue_date] => 1997-01-28
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