Search

Hua Jasmine Song

Examiner (ID: 6964, Phone: (571)272-4213 , Office: P/2133 )

Most Active Art Unit
2133
Art Unit(s)
2131, 2189, 2187, 2138, 2133, 2188
Total Applications
1393
Issued Applications
1256
Pending Applications
72
Abandoned Applications
80

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3491943 [patent_doc_number] => 05536666 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-16 [patent_title] => 'Method for fabricating a planar ion-implanted GaAs MESFET with improved open-channel burnout characteristics' [patent_app_type] => 1 [patent_app_number] => 8/405174 [patent_app_country] => US [patent_app_date] => 1995-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3357 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/536/05536666.pdf [firstpage_image] =>[orig_patent_app_number] => 405174 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/405174
Method for fabricating a planar ion-implanted GaAs MESFET with improved open-channel burnout characteristics Mar 15, 1995 Issued
Array ( [id] => 3619799 [patent_doc_number] => 05614438 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-25 [patent_title] => 'Method for making LSCO stack electrode' [patent_app_type] => 1 [patent_app_number] => 8/405216 [patent_app_country] => US [patent_app_date] => 1995-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2004 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/614/05614438.pdf [firstpage_image] =>[orig_patent_app_number] => 405216 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/405216
Method for making LSCO stack electrode Mar 14, 1995 Issued
Array ( [id] => 3517508 [patent_doc_number] => 05506165 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-09 [patent_title] => 'Method of manufacturing liquid-crystal display panel' [patent_app_type] => 1 [patent_app_number] => 8/404462 [patent_app_country] => US [patent_app_date] => 1995-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 28 [patent_no_of_words] => 3754 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/506/05506165.pdf [firstpage_image] =>[orig_patent_app_number] => 404462 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/404462
Method of manufacturing liquid-crystal display panel Mar 14, 1995 Issued
Array ( [id] => 3538273 [patent_doc_number] => 05494860 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-02-27 [patent_title] => 'Two step annealing process for decreasing contact resistance' [patent_app_type] => 1 [patent_app_number] => 8/404080 [patent_app_country] => US [patent_app_date] => 1995-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3583 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/494/05494860.pdf [firstpage_image] =>[orig_patent_app_number] => 404080 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/404080
Two step annealing process for decreasing contact resistance Mar 13, 1995 Issued
Array ( [id] => 3686808 [patent_doc_number] => 05643805 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-01 [patent_title] => 'Process for producing a bipolar device' [patent_app_type] => 1 [patent_app_number] => 8/401678 [patent_app_country] => US [patent_app_date] => 1995-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 8682 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/643/05643805.pdf [firstpage_image] =>[orig_patent_app_number] => 401678 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/401678
Process for producing a bipolar device Mar 9, 1995 Issued
Array ( [id] => 3791673 [patent_doc_number] => 05726085 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-10 [patent_title] => 'Method of fabricating a dynamic random access memory (DRAM) cell capacitor using hemispherical grain (HSG) polysilicon and selective polysilicon etchback' [patent_app_type] => 1 [patent_app_number] => 8/401740 [patent_app_country] => US [patent_app_date] => 1995-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 2524 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/726/05726085.pdf [firstpage_image] =>[orig_patent_app_number] => 401740 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/401740
Method of fabricating a dynamic random access memory (DRAM) cell capacitor using hemispherical grain (HSG) polysilicon and selective polysilicon etchback Mar 8, 1995 Issued
Array ( [id] => 3700254 [patent_doc_number] => 05646066 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-08 [patent_title] => 'Method for forming electrical contact to the optical coating of an infrared detector from the backside of the detector' [patent_app_type] => 1 [patent_app_number] => 8/396944 [patent_app_country] => US [patent_app_date] => 1995-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 2899 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/646/05646066.pdf [firstpage_image] =>[orig_patent_app_number] => 396944 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/396944
Method for forming electrical contact to the optical coating of an infrared detector from the backside of the detector Feb 28, 1995 Issued
Array ( [id] => 3513971 [patent_doc_number] => 05512502 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-30 [patent_title] => 'Manufacturing method for semiconductor integrated circuit device' [patent_app_type] => 1 [patent_app_number] => 8/396786 [patent_app_country] => US [patent_app_date] => 1995-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 24 [patent_no_of_words] => 5243 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/512/05512502.pdf [firstpage_image] =>[orig_patent_app_number] => 396786 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/396786
Manufacturing method for semiconductor integrated circuit device Feb 28, 1995 Issued
Array ( [id] => 3657784 [patent_doc_number] => 05591655 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-07 [patent_title] => 'Process for manufacturing a vertical switched-emitter structure with improved lateral isolation' [patent_app_type] => 1 [patent_app_number] => 8/397710 [patent_app_country] => US [patent_app_date] => 1995-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3020 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/591/05591655.pdf [firstpage_image] =>[orig_patent_app_number] => 397710 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/397710
Process for manufacturing a vertical switched-emitter structure with improved lateral isolation Feb 27, 1995 Issued
Array ( [id] => 3612852 [patent_doc_number] => 05534462 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-09 [patent_title] => 'Method for forming a plug and semiconductor device having the same' [patent_app_type] => 1 [patent_app_number] => 8/393782 [patent_app_country] => US [patent_app_date] => 1995-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 4518 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/534/05534462.pdf [firstpage_image] =>[orig_patent_app_number] => 393782 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/393782
Method for forming a plug and semiconductor device having the same Feb 23, 1995 Issued
Array ( [id] => 3561138 [patent_doc_number] => 05525533 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-11 [patent_title] => 'Method of making a low voltage coefficient capacitor' [patent_app_type] => 1 [patent_app_number] => 8/385522 [patent_app_country] => US [patent_app_date] => 1995-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 1967 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/525/05525533.pdf [firstpage_image] =>[orig_patent_app_number] => 385522 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/385522
Method of making a low voltage coefficient capacitor Feb 7, 1995 Issued
Array ( [id] => 3611440 [patent_doc_number] => 05565370 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-15 [patent_title] => 'Method of enhancing the current gain of bipolar junction transistors' [patent_app_type] => 1 [patent_app_number] => 8/385005 [patent_app_country] => US [patent_app_date] => 1995-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 10 [patent_no_of_words] => 4896 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/565/05565370.pdf [firstpage_image] =>[orig_patent_app_number] => 385005 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/385005
Method of enhancing the current gain of bipolar junction transistors Feb 6, 1995 Issued
Array ( [id] => 3525759 [patent_doc_number] => 05541121 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-30 [patent_title] => 'Reduced resistance base contact method for single polysilicon bipolar transistors using extrinsic base diffusion from a diffusion source dielectric layer' [patent_app_type] => 1 [patent_app_number] => 8/380906 [patent_app_country] => US [patent_app_date] => 1995-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 2459 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/541/05541121.pdf [firstpage_image] =>[orig_patent_app_number] => 380906 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/380906
Reduced resistance base contact method for single polysilicon bipolar transistors using extrinsic base diffusion from a diffusion source dielectric layer Jan 29, 1995 Issued
Array ( [id] => 3589049 [patent_doc_number] => 05496746 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-03-05 [patent_title] => 'Method for fabricating a bipolar junction transistor exhibiting improved beta and punch-through characteristics' [patent_app_type] => 1 [patent_app_number] => 8/378352 [patent_app_country] => US [patent_app_date] => 1995-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 18 [patent_no_of_words] => 4114 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/496/05496746.pdf [firstpage_image] =>[orig_patent_app_number] => 378352 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/378352
Method for fabricating a bipolar junction transistor exhibiting improved beta and punch-through characteristics Jan 24, 1995 Issued
Array ( [id] => 3700239 [patent_doc_number] => 05646064 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-08 [patent_title] => 'Method of fabricating a segmented monocrystalline chip' [patent_app_type] => 1 [patent_app_number] => 8/375982 [patent_app_country] => US [patent_app_date] => 1995-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 5 [patent_no_of_words] => 1564 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/646/05646064.pdf [firstpage_image] =>[orig_patent_app_number] => 375982 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/375982
Method of fabricating a segmented monocrystalline chip Jan 19, 1995 Issued
Array ( [id] => 3549848 [patent_doc_number] => 05547902 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-08-20 [patent_title] => 'Post hot working process for semiconductors' [patent_app_type] => 1 [patent_app_number] => 8/375414 [patent_app_country] => US [patent_app_date] => 1995-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 4348 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/547/05547902.pdf [firstpage_image] =>[orig_patent_app_number] => 375414 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/375414
Post hot working process for semiconductors Jan 17, 1995 Issued
Array ( [id] => 3558408 [patent_doc_number] => 05500378 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-03-19 [patent_title] => 'Process for forming a bipolar type semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/369660 [patent_app_country] => US [patent_app_date] => 1995-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 48 [patent_no_of_words] => 13312 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/500/05500378.pdf [firstpage_image] =>[orig_patent_app_number] => 369660 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/369660
Process for forming a bipolar type semiconductor device Jan 5, 1995 Issued
Array ( [id] => 3458824 [patent_doc_number] => 05441898 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-08-15 [patent_title] => 'Fabricating a semiconductor with an insulative coating' [patent_app_type] => 1 [patent_app_number] => 8/363732 [patent_app_country] => US [patent_app_date] => 1994-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 32 [patent_no_of_words] => 10677 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 367 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/441/05441898.pdf [firstpage_image] =>[orig_patent_app_number] => 363732 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/363732
Fabricating a semiconductor with an insulative coating Dec 28, 1994 Issued
Array ( [id] => 3412320 [patent_doc_number] => 05444009 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-08-22 [patent_title] => 'Fabricating a semiconductor with an insulative coating' [patent_app_type] => 1 [patent_app_number] => 8/363733 [patent_app_country] => US [patent_app_date] => 1994-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 32 [patent_no_of_words] => 10681 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 344 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/444/05444009.pdf [firstpage_image] =>[orig_patent_app_number] => 363733 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/363733
Fabricating a semiconductor with an insulative coating Dec 22, 1994 Issued
Array ( [id] => 3620205 [patent_doc_number] => 05688724 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-18 [patent_title] => 'Method of providing a dielectric structure for semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 8/363972 [patent_app_country] => US [patent_app_date] => 1994-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 25 [patent_no_of_words] => 8186 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/688/05688724.pdf [firstpage_image] =>[orig_patent_app_number] => 363972 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/363972
Method of providing a dielectric structure for semiconductor devices Dec 22, 1994 Issued
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