Hua Jasmine Song

Array ( [id] => 3113277 [patent_doc_number] => 05409862 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-04-25 [patent_title] => 'Method for making aluminum single crystal interconnections on insulators' [patent_app_type] => 1 [patent_app_number] => 8/035208 [patent_app_country] => US [patent_app_date] => 1993-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 94 [patent_no_of_words] => 16418 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/409/05409862.pdf [firstpage_image] =>[orig_patent_app_number] => 035208 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2996430 [patent_doc_number] => 05358882 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-10-25 [patent_title] => 'Method for manufacturing a bipolar transistor in a substrate' [patent_app_type] => 1 [patent_app_number] => 8/030901 [patent_app_country] => US [patent_app_date] => 1993-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3393 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/358/05358882.pdf [firstpage_image] =>[orig_patent_app_number] => 030901 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3004350 [patent_doc_number] => 05374569 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-12-20 [patent_title] => 'Method for forming a BiCDMOS' [patent_app_type] => 1 [patent_app_number] => 8/026932 [patent_app_country] => US [patent_app_date] => 1993-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 42 [patent_no_of_words] => 13282 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/374/05374569.pdf [firstpage_image] =>[orig_patent_app_number] => 026932 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3093154 [patent_doc_number] => 05369042 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-11-29 [patent_title] => 'Enhanced performance bipolar transistor process' [patent_app_type] => 1 [patent_app_number] => 8/026886 [patent_app_country] => US [patent_app_date] => 1993-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3164 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/369/05369042.pdf [firstpage_image] =>[orig_patent_app_number] => 026886 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3056841 [patent_doc_number] => 05338696 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-08-16 [patent_title] => 'Method of fabricating BiCMOS device' [patent_app_type] => 1 [patent_app_number] => 8/022708 [patent_app_country] => US [patent_app_date] => 1993-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 27 [patent_no_of_words] => 6071 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/338/05338696.pdf [firstpage_image] =>[orig_patent_app_number] => 022708 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2993204 [patent_doc_number] => 05366907 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-11-22 [patent_title] => 'Method of fabricating a BI-CMOS integrated circuit device' [patent_app_type] => 1 [patent_app_number] => 8/024730 [patent_app_country] => US [patent_app_date] => 1993-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 11092 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 322 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/366/05366907.pdf [firstpage_image] =>[orig_patent_app_number] => 024730 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3029304 [patent_doc_number] => 05342802 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-08-30 [patent_title] => 'Method of manufacturing a complementary MIS transistor' [patent_app_type] => 1 [patent_app_number] => 8/047543 [patent_app_country] => US [patent_app_date] => 1993-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 32 [patent_no_of_words] => 5383 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 376 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/342/05342802.pdf [firstpage_image] =>[orig_patent_app_number] => 047543 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3038532 [patent_doc_number] => 05376565 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-12-27 [patent_title] => 'Fabrication of lateral bipolar transistor' [patent_app_type] => 1 [patent_app_number] => 8/021401 [patent_app_country] => US [patent_app_date] => 1993-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 25 [patent_no_of_words] => 3477 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/376/05376565.pdf [firstpage_image] =>[orig_patent_app_number] => 021401 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3036703 [patent_doc_number] => 05372953 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-12-13 [patent_title] => 'Method of manufacturing a bipolar transistor included in an integrated circuit having no field oxide film between a p-type region and its electrode' [patent_app_type] => 1 [patent_app_number] => 8/020543 [patent_app_country] => US [patent_app_date] => 1993-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 3285 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/372/05372953.pdf [firstpage_image] =>[orig_patent_app_number] => 020543 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3410874 [patent_doc_number] => 05411898 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-05-02 [patent_title] => 'Method of manufacturing a complementary bipolar transistor' [patent_app_type] => 1 [patent_app_number] => 8/019898 [patent_app_country] => US [patent_app_date] => 1993-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 4242 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/411/05411898.pdf [firstpage_image] =>[orig_patent_app_number] => 019898 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3075751 [patent_doc_number] => 05322808 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-06-21 [patent_title] => 'Method of fabricating inverted modulation-doped heterostructure' [patent_app_type] => 1 [patent_app_number] => 8/020095 [patent_app_country] => US [patent_app_date] => 1993-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2281 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/322/05322808.pdf [firstpage_image] =>[orig_patent_app_number] => 020095 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3095140 [patent_doc_number] => 05318917 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-06-07 [patent_title] => 'Method of fabricating semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/015191 [patent_app_country] => US [patent_app_date] => 1993-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 42 [patent_no_of_words] => 11641 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/318/05318917.pdf [firstpage_image] =>[orig_patent_app_number] => 015191 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3075789 [patent_doc_number] => 05322810 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-06-21 [patent_title] => 'Method for manufacturing a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/015430 [patent_app_country] => US [patent_app_date] => 1993-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 3455 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/322/05322810.pdf [firstpage_image] =>[orig_patent_app_number] => 015430 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3478157 [patent_doc_number] => 05399509 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-03-21 [patent_title] => 'Method of manufacturing a bipolar transistor' [patent_app_type] => 1 [patent_app_number] => 8/013473 [patent_app_country] => US [patent_app_date] => 1993-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 27 [patent_no_of_words] => 3978 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/399/05399509.pdf [firstpage_image] =>[orig_patent_app_number] => 013473 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3004248 [patent_doc_number] => 05374566 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-12-20 [patent_title] => 'Method of fabricating a BiCMOS structure' [patent_app_type] => 1 [patent_app_number] => 8/009691 [patent_app_country] => US [patent_app_date] => 1993-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 31 [patent_no_of_words] => 7059 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/374/05374566.pdf [firstpage_image] =>[orig_patent_app_number] => 009691 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3070935 [patent_doc_number] => 05360748 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-11-01 [patent_title] => 'Method of manufacturing a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/007876 [patent_app_country] => US [patent_app_date] => 1993-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 5658 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/360/05360748.pdf [firstpage_image] =>[orig_patent_app_number] => 007876 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3093610 [patent_doc_number] => 05298439 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-03-29 [patent_title] => '1/f noise reduction in heterojunction bipolar transistors' [patent_app_type] => 1 [patent_app_number] => 7/999076 [patent_app_country] => US [patent_app_date] => 1992-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 33 [patent_no_of_words] => 3533 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/298/05298439.pdf [firstpage_image] =>[orig_patent_app_number] => 999076 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3489507 [patent_doc_number] => 05439848 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-08-08 [patent_title] => 'Method for fabricating a self-aligned multi-level interconnect' [patent_app_type] => 1 [patent_app_number] => 7/997730 [patent_app_country] => US [patent_app_date] => 1992-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 7705 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/439/05439848.pdf [firstpage_image] =>[orig_patent_app_number] => 997730 [rel_patent_id] =>[rel_patent_doc_number] =>)