| Application number | Title of the application | Filing Date | Status |
|---|
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[patent_issue_date] => 1992-02-11
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Array
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[patent_doc_number] => 05120572
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-06-09
[patent_title] => 'Method of fabricating electrical components in high density substrates'
[patent_app_type] => 1
[patent_app_number] => 7/605806
[patent_app_country] => US
[patent_app_date] => 1990-10-30
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[firstpage_image] =>[orig_patent_app_number] => 605806
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/605806 | Method of fabricating electrical components in high density substrates | Oct 29, 1990 | Issued |
| 07/604000 | METHOD AND APPARATUS FOR FORMING DIFFUSION JUNCTIONS IN SOLAR CELL SUBSTRATES | Oct 23, 1990 | Abandoned |
Array
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[id] => 2692767
[patent_doc_number] => 05064776
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-11-12
[patent_title] => 'Method of forming buried contact between polysilicon gate and diffusion area'
[patent_app_type] => 1
[patent_app_number] => 7/592121
[patent_app_country] => US
[patent_app_date] => 1990-10-03
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/592121 | Method of forming buried contact between polysilicon gate and diffusion area | Oct 2, 1990 | Issued |
| 07/589354 | SELF-ALIGNED COMPLEMENTARY HFETS | Sep 27, 1990 | Abandoned |
Array
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[patent_doc_number] => 05110760
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Array
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| 07/585218 | METHOD FOR FORMING A METAL LAYER IN A SEMICONDUCTOR DEVICE | Sep 18, 1990 | Abandoned |
Array
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[patent_issue_date] => 1992-05-12
[patent_title] => 'Process for forming a Schottky barrier gate'
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Array
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[patent_issue_date] => 1991-12-17
[patent_title] => 'Method of manufacturing an integrated semiconductor circuit including a bipolar heterojunction transistor and/or buried resistors'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/583270 | Method of manufacturing an integrated semiconductor circuit including a bipolar heterojunction transistor and/or buried resistors | Sep 13, 1990 | Issued |
Array
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Array
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Array
(
[id] => 2824735
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[patent_kind] => NA
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| 07/567606 | ERASE PERFORMANCE IMPROVEMENT VIA DUAL FLOATING GATE PROCESSING | Aug 14, 1990 | Abandoned |
Array
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