
Hua Jasmine Song
Examiner (ID: 6964, Phone: (571)272-4213 , Office: P/2133 )
| Most Active Art Unit | 2133 |
| Art Unit(s) | 2131, 2189, 2187, 2138, 2133, 2188 |
| Total Applications | 1393 |
| Issued Applications | 1256 |
| Pending Applications | 72 |
| Abandoned Applications | 80 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 2706560
[patent_doc_number] => 05055427
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-10-08
[patent_title] => 'Process of forming self-aligned interconnects for semiconductor devices'
[patent_app_type] => 1
[patent_app_number] => 7/346424
[patent_app_country] => US
[patent_app_date] => 1989-05-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 25
[patent_no_of_words] => 7519
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/055/05055427.pdf
[firstpage_image] =>[orig_patent_app_number] => 346424
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/346424 | Process of forming self-aligned interconnects for semiconductor devices | Apr 30, 1989 | Issued |
Array
(
[id] => 2742715
[patent_doc_number] => 05023205
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-06-11
[patent_title] => 'Method of fabricating hybrid circuit structures'
[patent_app_type] => 1
[patent_app_number] => 7/344252
[patent_app_country] => US
[patent_app_date] => 1989-04-27
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/023/05023205.pdf
[firstpage_image] =>[orig_patent_app_number] => 344252
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/344252 | Method of fabricating hybrid circuit structures | Apr 26, 1989 | Issued |
Array
(
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[patent_doc_number] => 05039624
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[patent_kind] => NA
[patent_issue_date] => 1991-08-13
[patent_title] => 'Method of manufacturing a bipolar transistor'
[patent_app_type] => 1
[patent_app_number] => 7/343956
[patent_app_country] => US
[patent_app_date] => 1989-04-26
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 4653
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[pdf_file] => patents/05/039/05039624.pdf
[firstpage_image] =>[orig_patent_app_number] => 343956
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/343956 | Method of manufacturing a bipolar transistor | Apr 25, 1989 | Issued |
Array
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[patent_doc_number] => 04902638
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-02-20
[patent_title] => 'Thin film transistor, method of repairing the thin film transistor and display apparatus having the thin film transistor'
[patent_app_type] => 1
[patent_app_number] => 7/342355
[patent_app_country] => US
[patent_app_date] => 1989-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[pdf_file] => patents/04/902/04902638.pdf
[firstpage_image] =>[orig_patent_app_number] => 342355
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/342355 | Thin film transistor, method of repairing the thin film transistor and display apparatus having the thin film transistor | Apr 23, 1989 | Issued |
Array
(
[id] => 2679788
[patent_doc_number] => 05066605
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-11-19
[patent_title] => 'Process of producing monolithically integrated multifunction circuit arrangements'
[patent_app_type] => 1
[patent_app_number] => 7/341205
[patent_app_country] => US
[patent_app_date] => 1989-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_no_of_words] => 2839
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[pdf_file] => patents/05/066/05066605.pdf
[firstpage_image] =>[orig_patent_app_number] => 341205
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/341205 | Process of producing monolithically integrated multifunction circuit arrangements | Apr 20, 1989 | Issued |
Array
(
[id] => 2656513
[patent_doc_number] => 04962058
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-10-09
[patent_title] => 'Process for fabricating multi-level integrated circuit wiring structure from a single metal deposit'
[patent_app_type] => 1
[patent_app_number] => 7/337807
[patent_app_country] => US
[patent_app_date] => 1989-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/04/962/04962058.pdf
[firstpage_image] =>[orig_patent_app_number] => 337807
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/337807 | Process for fabricating multi-level integrated circuit wiring structure from a single metal deposit | Apr 13, 1989 | Issued |
Array
(
[id] => 2623687
[patent_doc_number] => 04956305
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[patent_app_type] => 1
[patent_app_number] => 7/337945
[patent_app_country] => US
[patent_app_date] => 1989-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 3170
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[pdf_file] => patents/04/956/04956305.pdf
[firstpage_image] =>[orig_patent_app_number] => 337945
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/337945 | Process for fabricating an integrated circuit | Apr 13, 1989 | Issued |
Array
(
[id] => 2693345
[patent_doc_number] => 04990462
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-02-05
[patent_title] => 'Method for coplanar integration of semiconductor ic devices'
[patent_app_type] => 1
[patent_app_number] => 7/337223
[patent_app_country] => US
[patent_app_date] => 1989-04-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
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[patent_no_of_words] => 16855
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[pdf_file] => patents/04/990/04990462.pdf
[firstpage_image] =>[orig_patent_app_number] => 337223
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/337223 | Method for coplanar integration of semiconductor ic devices | Apr 11, 1989 | Issued |
Array
(
[id] => 2567585
[patent_doc_number] => 04900687
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-02-13
[patent_title] => 'Process for forming a magnetic field sensor'
[patent_app_type] => 1
[patent_app_number] => 7/331720
[patent_app_country] => US
[patent_app_date] => 1989-04-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => patents/04/900/04900687.pdf
[firstpage_image] =>[orig_patent_app_number] => 331720
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/331720 | Process for forming a magnetic field sensor | Apr 2, 1989 | Issued |
Array
(
[id] => 2586357
[patent_doc_number] => 04963503
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-10-16
[patent_title] => 'Method of manufacturing liquid crystal display device'
[patent_app_type] => 1
[patent_app_number] => 7/330254
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[patent_app_date] => 1989-03-29
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/04/963/04963503.pdf
[firstpage_image] =>[orig_patent_app_number] => 330254
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/330254 | Method of manufacturing liquid crystal display device | Mar 28, 1989 | Issued |
Array
(
[id] => 2747330
[patent_doc_number] => 05037769
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-08-06
[patent_title] => 'Method of manufacturing semiconductor device'
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[pdf_file] => patents/05/037/05037769.pdf
[firstpage_image] =>[orig_patent_app_number] => 330956
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/330956 | Method of manufacturing semiconductor device | Mar 27, 1989 | Issued |
| 07/327627 | SEMICONDUCTOR DEVICE WITH SELF-ALIGNED CONTACT TO BURIED SUBCOLLECTOR | Mar 23, 1989 | Abandoned |
Array
(
[id] => 2669159
[patent_doc_number] => 04999316
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-03-12
[patent_title] => 'Method for forming tapered laser or waveguide optoelectronic structures'
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Array
(
[id] => 2732888
[patent_doc_number] => 05032536
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[patent_title] => 'Method for manufacturing a liquid crystal display device with thin-film-transistors'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/322982 | Method for manufacturing a liquid crystal display device with thin-film-transistors | Mar 13, 1989 | Issued |
Array
(
[id] => 2656602
[patent_doc_number] => 04962063
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[patent_title] => 'Multistep planarized chemical vapor deposition process with the use of low melting inorganic material for flowing while depositing'
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[pdf_file] => patents/04/962/04962063.pdf
[firstpage_image] =>[orig_patent_app_number] => 321943
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Array
(
[id] => 2587703
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[patent_issue_date] => 1990-05-22
[patent_title] => 'Method of fabricating a high performance bipolar and MOS device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/319387 | Method of fabricating a high performance bipolar and MOS device | Mar 5, 1989 | Issued |
Array
(
[id] => 2693637
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[patent_issue_date] => 1991-02-26
[patent_title] => 'Method for forming lateral PNP transistor'
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[pdf_file] => patents/04/996/04996164.pdf
[firstpage_image] =>[orig_patent_app_number] => 317877
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/317877 | Method for forming lateral PNP transistor | Mar 1, 1989 | Issued |
| 07/315910 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME | Feb 23, 1989 | Abandoned |
Array
(
[id] => 2767254
[patent_doc_number] => 05036016
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[firstpage_image] =>[orig_patent_app_number] => 315356
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/315356 | VLSI bipolar transistor process | Feb 20, 1989 | Issued |
Array
(
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