
Hua Jasmine Song
Examiner (ID: 6964, Phone: (571)272-4213 , Office: P/2133 )
| Most Active Art Unit | 2133 |
| Art Unit(s) | 2131, 2189, 2187, 2138, 2133, 2188 |
| Total Applications | 1393 |
| Issued Applications | 1256 |
| Pending Applications | 72 |
| Abandoned Applications | 80 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 2670000
[patent_doc_number] => 04983532
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-01-08
[patent_title] => 'Process for fabricating heterojunction bipolar transistors'
[patent_app_type] => 1
[patent_app_number] => 7/286710
[patent_app_country] => US
[patent_app_date] => 1988-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 22
[patent_no_of_words] => 2749
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/983/04983532.pdf
[firstpage_image] =>[orig_patent_app_number] => 286710
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/286710 | Process for fabricating heterojunction bipolar transistors | Dec 19, 1988 | Issued |
Array
(
[id] => 2745180
[patent_doc_number] => 04987101
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-01-22
[patent_title] => 'Method for providing improved insulation in VLSI and ULSI circuits'
[patent_app_type] => 1
[patent_app_number] => 7/286443
[patent_app_country] => US
[patent_app_date] => 1988-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 21
[patent_no_of_words] => 3102
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/987/04987101.pdf
[firstpage_image] =>[orig_patent_app_number] => 286443
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/286443 | Method for providing improved insulation in VLSI and ULSI circuits | Dec 15, 1988 | Issued |
Array
(
[id] => 2666795
[patent_doc_number] => 04935375
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-06-19
[patent_title] => 'Method of making a semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 7/285389
[patent_app_country] => US
[patent_app_date] => 1988-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 2714
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 344
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/935/04935375.pdf
[firstpage_image] =>[orig_patent_app_number] => 285389
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/285389 | Method of making a semiconductor device | Dec 15, 1988 | Issued |
| 07/283405 | METHOD OF MANUFACTURING AMORPHOUS-SILICON THIN-FILM TRANSISTORS | Dec 11, 1988 | Abandoned |
Array
(
[id] => 2567623
[patent_doc_number] => 04900689
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-02-13
[patent_title] => 'Method of fabrication of isolated islands for complementary bipolar devices'
[patent_app_type] => 1
[patent_app_number] => 7/281546
[patent_app_country] => US
[patent_app_date] => 1988-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 14
[patent_no_of_words] => 2384
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 164
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/900/04900689.pdf
[firstpage_image] =>[orig_patent_app_number] => 281546
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/281546 | Method of fabrication of isolated islands for complementary bipolar devices | Dec 7, 1988 | Issued |
Array
(
[id] => 2586138
[patent_doc_number] => 04891329
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-01-02
[patent_title] => 'Method of forming a nonsilicon semiconductor on insulator structure'
[patent_app_type] => 1
[patent_app_number] => 7/277168
[patent_app_country] => US
[patent_app_date] => 1988-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 4
[patent_no_of_words] => 3356
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/891/04891329.pdf
[firstpage_image] =>[orig_patent_app_number] => 277168
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/277168 | Method of forming a nonsilicon semiconductor on insulator structure | Nov 28, 1988 | Issued |
| 07/276824 | INTERSTITIAL DOPING IN III-V SEMICONDUCTORS TO AVOID OR SUPPRESS DX CENTER FORMATION | Nov 27, 1988 | Abandoned |
Array
(
[id] => 2515190
[patent_doc_number] => 04855257
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-08-08
[patent_title] => 'Forming contacts to semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 7/273011
[patent_app_country] => US
[patent_app_date] => 1988-11-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 23
[patent_no_of_words] => 5718
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 309
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/855/04855257.pdf
[firstpage_image] =>[orig_patent_app_number] => 273011
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/273011 | Forming contacts to semiconductor device | Nov 17, 1988 | Issued |
Array
(
[id] => 2666474
[patent_doc_number] => 04904607
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-02-27
[patent_title] => 'Method of manufacturing an integrated infrared detector'
[patent_app_type] => 1
[patent_app_number] => 7/271569
[patent_app_country] => US
[patent_app_date] => 1988-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 20
[patent_no_of_words] => 6177
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 260
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/904/04904607.pdf
[firstpage_image] =>[orig_patent_app_number] => 271569
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/271569 | Method of manufacturing an integrated infrared detector | Nov 14, 1988 | Issued |
Array
(
[id] => 2635569
[patent_doc_number] => 04898837
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-02-06
[patent_title] => 'Method of fabricating a semiconductor integrated circuit'
[patent_app_type] => 1
[patent_app_number] => 7/271748
[patent_app_country] => US
[patent_app_date] => 1988-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 19
[patent_no_of_words] => 4260
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 235
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/898/04898837.pdf
[firstpage_image] =>[orig_patent_app_number] => 271748
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/271748 | Method of fabricating a semiconductor integrated circuit | Nov 14, 1988 | Issued |
Array
(
[id] => 2635609
[patent_doc_number] => 04898839
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-02-06
[patent_title] => 'Semiconductor integrated circuit and manufacturing method therefor'
[patent_app_type] => 1
[patent_app_number] => 7/271746
[patent_app_country] => US
[patent_app_date] => 1988-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 24
[patent_no_of_words] => 4574
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 176
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/898/04898839.pdf
[firstpage_image] =>[orig_patent_app_number] => 271746
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/271746 | Semiconductor integrated circuit and manufacturing method therefor | Nov 14, 1988 | Issued |
Array
(
[id] => 2523547
[patent_doc_number] => 04883766
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-11-28
[patent_title] => 'Method of producing thin film transistor'
[patent_app_type] => 1
[patent_app_number] => 7/269452
[patent_app_country] => US
[patent_app_date] => 1988-11-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 7
[patent_no_of_words] => 2575
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/883/04883766.pdf
[firstpage_image] =>[orig_patent_app_number] => 269452
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/269452 | Self teaching coin discriminator | Nov 13, 1988 | Issued |
Array
(
[id] => 2523547
[patent_doc_number] => 04883766
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-11-28
[patent_title] => 'Method of producing thin film transistor'
[patent_app_type] => 1
[patent_app_number] => 7/269452
[patent_app_country] => US
[patent_app_date] => 1988-11-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 7
[patent_no_of_words] => 2575
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/883/04883766.pdf
[firstpage_image] =>[orig_patent_app_number] => 269452
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/269452 | Self teaching coin discriminator | Nov 13, 1988 | Issued |
Array
(
[id] => 2661565
[patent_doc_number] => 04946801
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-08-07
[patent_title] => 'Epitaxial wafer'
[patent_app_type] => 1
[patent_app_number] => 7/270275
[patent_app_country] => US
[patent_app_date] => 1988-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 4
[patent_no_of_words] => 2564
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/946/04946801.pdf
[firstpage_image] =>[orig_patent_app_number] => 270275
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/270275 | Epitaxial wafer | Nov 13, 1988 | Issued |
Array
(
[id] => 2523547
[patent_doc_number] => 04883766
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-11-28
[patent_title] => 'Method of producing thin film transistor'
[patent_app_type] => 1
[patent_app_number] => 7/269452
[patent_app_country] => US
[patent_app_date] => 1988-11-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 7
[patent_no_of_words] => 2575
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/883/04883766.pdf
[firstpage_image] =>[orig_patent_app_number] => 269452
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/269452 | Method of producing thin film transistor | Nov 9, 1988 | Issued |
| 07/269508 | METHOD FOR PLANARIZING AN INTEGRATED CIRCUIT STRUCTURE USING LOW MELTING INORGANIC MATERIAL AND FLOWING WHILE DEPOSITING | Nov 9, 1988 | Abandoned |
Array
(
[id] => 2523547
[patent_doc_number] => 04883766
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-11-28
[patent_title] => 'Method of producing thin film transistor'
[patent_app_type] => 1
[patent_app_number] => 7/269452
[patent_app_country] => US
[patent_app_date] => 1988-11-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 7
[patent_no_of_words] => 2575
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/883/04883766.pdf
[firstpage_image] =>[orig_patent_app_number] => 269452
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/269452 | Method of producing thin film transistor | Nov 9, 1988 | Issued |
Array
(
[id] => 2804887
[patent_doc_number] => 05156989
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-10-20
[patent_title] => 'Complementary, isolated DMOS IC technology'
[patent_app_type] => 1
[patent_app_number] => 7/268839
[patent_app_country] => US
[patent_app_date] => 1988-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 44
[patent_no_of_words] => 15801
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 447
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/156/05156989.pdf
[firstpage_image] =>[orig_patent_app_number] => 268839
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/268839 | Complementary, isolated DMOS IC technology | Nov 7, 1988 | Issued |
Array
(
[id] => 2592704
[patent_doc_number] => 04933304
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-06-12
[patent_title] => 'Method for reducing the surface reflectance of a metal layer during semiconductor processing'
[patent_app_type] => 1
[patent_app_number] => 7/266796
[patent_app_country] => US
[patent_app_date] => 1988-11-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 8
[patent_no_of_words] => 3028
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/933/04933304.pdf
[firstpage_image] =>[orig_patent_app_number] => 266796
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/266796 | Method for reducing the surface reflectance of a metal layer during semiconductor processing | Nov 2, 1988 | Issued |
Array
(
[id] => 2705937
[patent_doc_number] => 04981807
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-01-01
[patent_title] => 'Process for fabricating complementary vertical transistor memory cell'
[patent_app_type] => 1
[patent_app_number] => 7/265062
[patent_app_country] => US
[patent_app_date] => 1988-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 6
[patent_no_of_words] => 2465
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 292
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/981/04981807.pdf
[firstpage_image] =>[orig_patent_app_number] => 265062
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/265062 | Process for fabricating complementary vertical transistor memory cell | Oct 30, 1988 | Issued |