
Hua Jasmine Song
Examiner (ID: 6964, Phone: (571)272-4213 , Office: P/2133 )
| Most Active Art Unit | 2133 |
| Art Unit(s) | 2131, 2189, 2187, 2138, 2133, 2188 |
| Total Applications | 1393 |
| Issued Applications | 1256 |
| Pending Applications | 72 |
| Abandoned Applications | 80 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 2600995
[patent_doc_number] => 04912055
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-03-27
[patent_title] => 'Method of fabricating a semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 7/265420
[patent_app_country] => US
[patent_app_date] => 1988-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 40
[patent_no_of_words] => 5188
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 438
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/912/04912055.pdf
[firstpage_image] =>[orig_patent_app_number] => 265420
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/265420 | Method of fabricating a semiconductor device | Oct 30, 1988 | Issued |
Array
(
[id] => 2733961
[patent_doc_number] => 04997789
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-03-05
[patent_title] => 'Aluminum contact etch mask and etchstop for tungsten etchback'
[patent_app_type] => 1
[patent_app_number] => 7/265162
[patent_app_country] => US
[patent_app_date] => 1988-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_no_of_words] => 1361
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/997/04997789.pdf
[firstpage_image] =>[orig_patent_app_number] => 265162
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/265162 | Aluminum contact etch mask and etchstop for tungsten etchback | Oct 30, 1988 | Issued |
Array
(
[id] => 2625663
[patent_doc_number] => 04920072
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-04-24
[patent_title] => 'Method of forming metal interconnects'
[patent_app_type] => 1
[patent_app_number] => 7/265157
[patent_app_country] => US
[patent_app_date] => 1988-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 1433
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[patent_words_short_claim] => 132
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[patent_no_of_assignments] => 0
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[pdf_file] => patents/04/920/04920072.pdf
[firstpage_image] =>[orig_patent_app_number] => 265157
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/265157 | Method of forming metal interconnects | Oct 30, 1988 | Issued |
| 07/265074 | METHOD FOR FORMING INTEGRATED CIRCUITS HAVING BURIED DOPED REGIONS | Oct 30, 1988 | Abandoned |
| 07/264083 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | Oct 27, 1988 | Abandoned |
Array
(
[id] => 2475800
[patent_doc_number] => 04871687
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-10-03
[patent_title] => 'Method of fabricating a MESFET transistor with gate spaced above source electrode by layer of air or the like'
[patent_app_type] => 1
[patent_app_number] => 7/261142
[patent_app_country] => US
[patent_app_date] => 1988-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 13
[patent_no_of_words] => 2883
[patent_no_of_claims] => 4
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[pdf_file] => patents/04/871/04871687.pdf
[firstpage_image] =>[orig_patent_app_number] => 261142
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/261142 | Method of fabricating a MESFET transistor with gate spaced above source electrode by layer of air or the like | Oct 23, 1988 | Issued |
Array
(
[id] => 2607403
[patent_doc_number] => 04902644
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-02-20
[patent_title] => 'Preservation of surface features on semiconductor surfaces'
[patent_app_type] => 1
[patent_app_number] => 7/260842
[patent_app_country] => US
[patent_app_date] => 1988-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[patent_no_of_words] => 2687
[patent_no_of_claims] => 17
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[pdf_file] => patents/04/902/04902644.pdf
[firstpage_image] =>[orig_patent_app_number] => 260842
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/260842 | Preservation of surface features on semiconductor surfaces | Oct 20, 1988 | Issued |
| 07/260721 | FET WITH A SUPER LATTICE CHANNEL | Oct 20, 1988 | Abandoned |
Array
(
[id] => 2595987
[patent_doc_number] => 04921813
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-05-01
[patent_title] => 'Method for making a polysilicon transistor'
[patent_app_type] => 1
[patent_app_number] => 7/258545
[patent_app_country] => US
[patent_app_date] => 1988-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 3780
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[pdf_file] => patents/04/921/04921813.pdf
[firstpage_image] =>[orig_patent_app_number] => 258545
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/258545 | Method for making a polysilicon transistor | Oct 16, 1988 | Issued |
Array
(
[id] => 2491107
[patent_doc_number] => 04843024
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-06-27
[patent_title] => 'Method of producing a Schottky gate field effect transistor'
[patent_app_type] => 1
[patent_app_number] => 7/258498
[patent_app_country] => US
[patent_app_date] => 1988-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 16
[patent_no_of_words] => 1771
[patent_no_of_claims] => 16
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[patent_no_of_assignments] => 0
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[pdf_file] => patents/04/843/04843024.pdf
[firstpage_image] =>[orig_patent_app_number] => 258498
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/258498 | Method of producing a Schottky gate field effect transistor | Oct 16, 1988 | Issued |
Array
(
[id] => 2646175
[patent_doc_number] => 04895811
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-01-23
[patent_title] => 'Method of manufacturing semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 7/253171
[patent_app_country] => US
[patent_app_date] => 1988-10-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 18
[patent_no_of_words] => 4182
[patent_no_of_claims] => 1
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[pdf_file] => patents/04/895/04895811.pdf
[firstpage_image] =>[orig_patent_app_number] => 253171
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/253171 | Method of manufacturing semiconductor device | Oct 3, 1988 | Issued |
Array
(
[id] => 2514974
[patent_doc_number] => 04855245
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-08-08
[patent_title] => 'Method of manufacturing integrated circuit containing bipolar and complementary MOS transistors on a common substrate'
[patent_app_type] => 1
[patent_app_number] => 7/253418
[patent_app_country] => US
[patent_app_date] => 1988-10-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[pdf_file] => patents/04/855/04855245.pdf
[firstpage_image] =>[orig_patent_app_number] => 253418
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/253418 | Method of manufacturing integrated circuit containing bipolar and complementary MOS transistors on a common substrate | Oct 3, 1988 | Issued |
Array
(
[id] => 2829102
[patent_doc_number] => 05098859
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-03-24
[patent_title] => 'Method for forming distributed barrier compound semiconductor contacts'
[patent_app_type] => 1
[patent_app_number] => 7/252634
[patent_app_country] => US
[patent_app_date] => 1988-10-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[pdf_file] => patents/05/098/05098859.pdf
[firstpage_image] =>[orig_patent_app_number] => 252634
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/252634 | Method for forming distributed barrier compound semiconductor contacts | Oct 2, 1988 | Issued |
Array
(
[id] => 2475781
[patent_doc_number] => 04889826
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-12-26
[patent_title] => 'Static induction transistor and manufacturing method of the same'
[patent_app_type] => 1
[patent_app_number] => 7/252729
[patent_app_country] => US
[patent_app_date] => 1988-10-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
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[pdf_file] => patents/04/889/04889826.pdf
[firstpage_image] =>[orig_patent_app_number] => 252729
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/252729 | Static induction transistor and manufacturing method of the same | Oct 2, 1988 | Issued |
Array
(
[id] => 2706057
[patent_doc_number] => 05013686
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-05-07
[patent_title] => 'Method of making semiconductor devices having ohmic contact'
[patent_app_type] => 1
[patent_app_number] => 7/252514
[patent_app_country] => US
[patent_app_date] => 1988-09-30
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[pdf_file] => patents/05/013/05013686.pdf
[firstpage_image] =>[orig_patent_app_number] => 252514
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/252514 | Method of making semiconductor devices having ohmic contact | Sep 29, 1988 | Issued |
Array
(
[id] => 2523000
[patent_doc_number] => 04877749
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-10-31
[patent_title] => 'Method of forming a low loss FET'
[patent_app_type] => 1
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[pdf_file] => patents/04/877/04877749.pdf
[firstpage_image] =>[orig_patent_app_number] => 252232
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/252232 | Method of forming a low loss FET | Sep 29, 1988 | Issued |
Array
(
[id] => 2657863
[patent_doc_number] => 04978630
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[patent_kind] => NA
[patent_issue_date] => 1990-12-18
[patent_title] => 'Fabrication method of bipolar transistor'
[patent_app_type] => 1
[patent_app_number] => 7/249310
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[pdf_file] => patents/04/978/04978630.pdf
[firstpage_image] =>[orig_patent_app_number] => 249310
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/249310 | Fabrication method of bipolar transistor | Sep 25, 1988 | Issued |
Array
(
[id] => 2515808
[patent_doc_number] => 04874712
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[patent_kind] => NA
[patent_issue_date] => 1989-10-17
[patent_title] => 'Fabrication method of bipolar transistor'
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[pdf_file] => patents/04/874/04874712.pdf
[firstpage_image] =>[orig_patent_app_number] => 249401
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/249401 | Fabrication method of bipolar transistor | Sep 25, 1988 | Issued |
Array
(
[id] => 2595317
[patent_doc_number] => 04923823
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-05-08
[patent_title] => 'Method of fabricating a self aligned semiconductor device'
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[pdf_file] => patents/04/923/04923823.pdf
[firstpage_image] =>[orig_patent_app_number] => 248429
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/248429 | Method of fabricating a self aligned semiconductor device | Sep 22, 1988 | Issued |
Array
(
[id] => 2620022
[patent_doc_number] => 04894350
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-01-16
[patent_title] => 'Method for manufacturing ohmic contacts having low transfer resistances'
[patent_app_type] => 1
[patent_app_number] => 7/248114
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[pdf_file] => patents/04/894/04894350.pdf
[firstpage_image] =>[orig_patent_app_number] => 248114
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/248114 | Method for manufacturing ohmic contacts having low transfer resistances | Sep 22, 1988 | Issued |