| Application number | Title of the application | Filing Date | Status |
|---|
Array
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Array
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[patent_issue_date] => 1990-01-02
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Array
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[patent_doc_number] => 04957875
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[patent_kind] => NA
[patent_issue_date] => 1990-09-18
[patent_title] => 'Vertical bipolar transistor'
[patent_app_type] => 1
[patent_app_number] => 7/226738
[patent_app_country] => US
[patent_app_date] => 1988-08-01
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 226738
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/226738 | Vertical bipolar transistor | Jul 31, 1988 | Issued |
| 07/226917 | PROCESS FOR FABRICATING INTEGRATED CIRCUITS HAVING SHALLOW JUNCTIONS | Jul 31, 1988 | Abandoned |
Array
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[id] => 2784207
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[patent_issue_date] => 1992-07-14
[patent_title] => 'Infrared staring imaging array and method of manufacture'
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Array
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[patent_issue_date] => 1989-08-22
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/226032 | Manufacturing method of semiconductor device having CCD and peripheral circuit | Jul 28, 1988 | Issued |
Array
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Array
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[patent_issue_date] => 1989-05-02
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[patent_app_number] => 7/224841
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[patent_app_date] => 1988-07-26
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[firstpage_image] =>[orig_patent_app_number] => 224841
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/224841 | Making a photoresponsive array | Jul 25, 1988 | Issued |
| 07/221572 | METHOD FOR MANUFACTURING BONDED SEMICONDUCTOR BODY | Jul 19, 1988 | Abandoned |
Array
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[id] => 2757814
[patent_doc_number] => 05059544
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[patent_issue_date] => 1991-10-22
[patent_title] => 'Method of forming bipolar transistor having self-aligned emitter-base using selective and non-selective epitaxy'
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[patent_app_number] => 7/219020
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/219020 | Method of forming bipolar transistor having self-aligned emitter-base using selective and non-selective epitaxy | Jul 13, 1988 | Issued |
Array
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[id] => 2628336
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[patent_issue_date] => 1990-04-10
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[firstpage_image] =>[orig_patent_app_number] => 217787
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/217787 | Method for manufacturing MOS semiconductor devices | Jul 11, 1988 | Issued |
| 07/214466 | METHOD OF LASER CONNECTION OF A CONDUCTOR TO A DOPED REGION OF THE SUBSTRATE OF AN INTEGRATED CIRCUIT, AND INTEGRATED CIRCUIT USING THE METHOD | Jun 30, 1988 | Abandoned |
| 07/211641 | PROCESS FOR FABRICATING ISOLATED VERTICAL BIPOLAR AND JFET TRANSISTORS | Jun 26, 1988 | Abandoned |
Array
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[id] => 2635644
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[patent_issue_date] => 1990-02-06
[patent_title] => 'Method of filling contact holes for semiconductor devices and contact structures made by that method'
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Array
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[patent_issue_date] => 1991-01-22
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Array
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Array
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