
Huan Hoang
Examiner (ID: 2059)
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2511, 2827, 2818, 2154 |
| Total Applications | 3262 |
| Issued Applications | 3045 |
| Pending Applications | 111 |
| Abandoned Applications | 129 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6677669
[patent_doc_number] => 20030227809
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-12-11
[patent_title] => 'Temperature-adjusted pre-charged reference for an integrated circuit 1T/1C ferroelectric memory'
[patent_app_type] => new
[patent_app_number] => 10/163323
[patent_app_country] => US
[patent_app_date] => 2002-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2671
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 51
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0227/20030227809.pdf
[firstpage_image] =>[orig_patent_app_number] => 10163323
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/163323 | Temperature-adjusted pre-charged reference for an integrated circuit 1T/1C ferroelectric memory | Jun 4, 2002 | Abandoned |
Array
(
[id] => 1288330
[patent_doc_number] => 06643199
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-11-04
[patent_title] => 'Memory with reduced sub-threshold leakage current in dynamic bit lines of read ports'
[patent_app_type] => B1
[patent_app_number] => 10/162929
[patent_app_country] => US
[patent_app_date] => 2002-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 1826
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/643/06643199.pdf
[firstpage_image] =>[orig_patent_app_number] => 10162929
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/162929 | Memory with reduced sub-threshold leakage current in dynamic bit lines of read ports | Jun 3, 2002 | Issued |
Array
(
[id] => 6395770
[patent_doc_number] => 20020181290
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-12-05
[patent_title] => 'Data output interface, in particular for semiconductor memories'
[patent_app_type] => new
[patent_app_number] => 10/157726
[patent_app_country] => US
[patent_app_date] => 2002-05-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2992
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 164
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0181/20020181290.pdf
[firstpage_image] =>[orig_patent_app_number] => 10157726
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/157726 | Data output interface, in particular for semiconductor memories | May 28, 2002 | Issued |
Array
(
[id] => 6859935
[patent_doc_number] => 20030090943
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-05-15
[patent_title] => 'Semiconductor memory'
[patent_app_type] => new
[patent_app_number] => 10/155029
[patent_app_country] => US
[patent_app_date] => 2002-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 8011
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 304
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0090/20030090943.pdf
[firstpage_image] =>[orig_patent_app_number] => 10155029
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/155029 | Semiconductor memory | May 27, 2002 | Issued |
Array
(
[id] => 1410336
[patent_doc_number] => 06545915
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-04-08
[patent_title] => 'Method for driving nonvolatile semiconductor memory device'
[patent_app_type] => B2
[patent_app_number] => 10/147321
[patent_app_country] => US
[patent_app_date] => 2002-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 14
[patent_no_of_words] => 7287
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 312
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/545/06545915.pdf
[firstpage_image] =>[orig_patent_app_number] => 10147321
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/147321 | Method for driving nonvolatile semiconductor memory device | May 16, 2002 | Issued |
Array
(
[id] => 6764734
[patent_doc_number] => 20030099132
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-05-29
[patent_title] => 'Semiconductor memory device including bit select circuit'
[patent_app_type] => new
[patent_app_number] => 10/146021
[patent_app_country] => US
[patent_app_date] => 2002-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 14473
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0099/20030099132.pdf
[firstpage_image] =>[orig_patent_app_number] => 10146021
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/146021 | Semiconductor memory device including bit select circuit | May 15, 2002 | Issued |
Array
(
[id] => 1216123
[patent_doc_number] => 06711067
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-03-23
[patent_title] => 'System and method for bit line sharing'
[patent_app_type] => B1
[patent_app_number] => 10/142523
[patent_app_country] => US
[patent_app_date] => 2002-05-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 10081
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/711/06711067.pdf
[firstpage_image] =>[orig_patent_app_number] => 10142523
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/142523 | System and method for bit line sharing | May 7, 2002 | Issued |
Array
(
[id] => 7624507
[patent_doc_number] => 06724669
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-04-20
[patent_title] => 'System and method for repairing a memory column'
[patent_app_type] => B1
[patent_app_number] => 10/142822
[patent_app_country] => US
[patent_app_date] => 2002-05-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 3422
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 9
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/724/06724669.pdf
[firstpage_image] =>[orig_patent_app_number] => 10142822
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/142822 | System and method for repairing a memory column | May 7, 2002 | Issued |
Array
(
[id] => 1291952
[patent_doc_number] => 06639838
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-10-28
[patent_title] => 'Non-volatile memory architecture and integrated circuit comprising a corresponding memory'
[patent_app_type] => B2
[patent_app_number] => 10/139621
[patent_app_country] => US
[patent_app_date] => 2002-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4799
[patent_no_of_claims] => 36
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/639/06639838.pdf
[firstpage_image] =>[orig_patent_app_number] => 10139621
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/139621 | Non-volatile memory architecture and integrated circuit comprising a corresponding memory | May 5, 2002 | Issued |
Array
(
[id] => 1110799
[patent_doc_number] => 06809949
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-10-26
[patent_title] => 'Ferroelectric memory'
[patent_app_type] => B2
[patent_app_number] => 10/139426
[patent_app_country] => US
[patent_app_date] => 2002-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 23
[patent_no_of_words] => 15665
[patent_no_of_claims] => 41
[patent_no_of_ind_claims] => 14
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/809/06809949.pdf
[firstpage_image] =>[orig_patent_app_number] => 10139426
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/139426 | Ferroelectric memory | May 5, 2002 | Issued |
Array
(
[id] => 772039
[patent_doc_number] => 07006395
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-02-28
[patent_title] => 'Semiconductor integrated circuit'
[patent_app_type] => utility
[patent_app_number] => 10/136280
[patent_app_country] => US
[patent_app_date] => 2002-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5407
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/006/07006395.pdf
[firstpage_image] =>[orig_patent_app_number] => 10136280
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/136280 | Semiconductor integrated circuit | May 1, 2002 | Issued |
Array
(
[id] => 780340
[patent_doc_number] => RE038956
[patent_country] => US
[patent_kind] => E1
[patent_issue_date] => 2006-01-31
[patent_title] => 'Data compression circuit and method for testing memory devices'
[patent_app_type] => reissue
[patent_app_number] => 10/139131
[patent_app_country] => US
[patent_app_date] => 2002-05-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 5493
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 12
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/RE/038/RE038956.pdf
[firstpage_image] =>[orig_patent_app_number] => 10139131
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/139131 | Data compression circuit and method for testing memory devices | May 1, 2002 | Issued |
Array
(
[id] => 7611876
[patent_doc_number] => 06903963
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-06-07
[patent_title] => 'Thin-film magnetic memory device executing data writing with data write magnetic fields in two directions'
[patent_app_type] => utility
[patent_app_number] => 10/134523
[patent_app_country] => US
[patent_app_date] => 2002-04-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 0
[patent_no_of_words] => 18089
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/903/06903963.pdf
[firstpage_image] =>[orig_patent_app_number] => 10134523
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/134523 | Thin-film magnetic memory device executing data writing with data write magnetic fields in two directions | Apr 29, 2002 | Issued |
Array
(
[id] => 1054713
[patent_doc_number] => 06859375
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-02-22
[patent_title] => 'Fast analog sampler with great memory depth'
[patent_app_type] => utility
[patent_app_number] => 10/475222
[patent_app_country] => US
[patent_app_date] => 2002-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 12883
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 199
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/859/06859375.pdf
[firstpage_image] =>[orig_patent_app_number] => 10475222
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/475222 | Fast analog sampler with great memory depth | Apr 23, 2002 | Issued |
Array
(
[id] => 6808137
[patent_doc_number] => 20030198076
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-10-23
[patent_title] => 'COMPACT AND HIGHLY EFFICIENT DRAM CELL'
[patent_app_type] => new
[patent_app_number] => 10/128328
[patent_app_country] => US
[patent_app_date] => 2002-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2546
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0198/20030198076.pdf
[firstpage_image] =>[orig_patent_app_number] => 10128328
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/128328 | Compact and highly efficient DRAM cell | Apr 22, 2002 | Issued |
Array
(
[id] => 6507093
[patent_doc_number] => 20020191443
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-12-19
[patent_title] => 'Nonvolatile semiconductor memory device and programming method thereof'
[patent_app_type] => new
[patent_app_number] => 10/131424
[patent_app_country] => US
[patent_app_date] => 2002-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 6086
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0191/20020191443.pdf
[firstpage_image] =>[orig_patent_app_number] => 10131424
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/131424 | Nonvolatile semiconductor memory device and programming method thereof | Apr 21, 2002 | Issued |
Array
(
[id] => 7624497
[patent_doc_number] => 06724679
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-04-20
[patent_title] => 'Semiconductor memory device allowing high density structure or high performance'
[patent_app_type] => B2
[patent_app_number] => 10/126622
[patent_app_country] => US
[patent_app_date] => 2002-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 44
[patent_figures_cnt] => 52
[patent_no_of_words] => 28037
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 6
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/724/06724679.pdf
[firstpage_image] =>[orig_patent_app_number] => 10126622
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/126622 | Semiconductor memory device allowing high density structure or high performance | Apr 21, 2002 | Issued |
Array
(
[id] => 1268891
[patent_doc_number] => 06661700
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-12-09
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => B2
[patent_app_number] => 10/118125
[patent_app_country] => US
[patent_app_date] => 2002-04-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 3167
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/661/06661700.pdf
[firstpage_image] =>[orig_patent_app_number] => 10118125
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/118125 | Semiconductor memory device | Apr 8, 2002 | Issued |
Array
(
[id] => 1319272
[patent_doc_number] => 06614700
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-09-02
[patent_title] => 'Circuit configuration with a memory array'
[patent_app_type] => B2
[patent_app_number] => 10/116826
[patent_app_country] => US
[patent_app_date] => 2002-04-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3754
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/614/06614700.pdf
[firstpage_image] =>[orig_patent_app_number] => 10116826
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/116826 | Circuit configuration with a memory array | Apr 4, 2002 | Issued |
Array
(
[id] => 1504390
[patent_doc_number] => 06487136
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2002-11-26
[patent_title] => 'Semiconductor memory device with reduced current consumption in data hold mode'
[patent_app_type] => B2
[patent_app_number] => 10/115618
[patent_app_country] => US
[patent_app_date] => 2002-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 64
[patent_no_of_words] => 26541
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/487/06487136.pdf
[firstpage_image] =>[orig_patent_app_number] => 10115618
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/115618 | Semiconductor memory device with reduced current consumption in data hold mode | Apr 3, 2002 | Issued |