
Huan Hoang
Examiner (ID: 2059)
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2511, 2827, 2818, 2154 |
| Total Applications | 3262 |
| Issued Applications | 3045 |
| Pending Applications | 111 |
| Abandoned Applications | 129 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6303928
[patent_doc_number] => 20020093865
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-07-18
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => new
[patent_app_number] => 10/043324
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[pdf_file] => publications/A1/0093/20020093865.pdf
[firstpage_image] =>[orig_patent_app_number] => 10043324
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/043324 | Semiconductor memory device | Jan 13, 2002 | Issued |
Array
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[patent_doc_number] => 20030107921
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[patent_issue_date] => 2003-06-12
[patent_title] => 'Method for operating a non-volatile memory'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/047720 | Method for operating a non-volatile memory | Jan 13, 2002 | Abandoned |
Array
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[patent_doc_number] => 20040095808
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[patent_title] => 'Nonvolatile semiconductor storage device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/250922 | Nonvolatile semiconductor storage device | Jan 10, 2002 | Issued |
Array
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[patent_issue_date] => 2003-06-24
[patent_title] => 'Memory system and semiconductor memory device for enhancing bus efficiency and refresh method of the semiconductor memory device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/044323 | Memory system and semiconductor memory device for enhancing bus efficiency and refresh method of the semiconductor memory device | Jan 9, 2002 | Issued |
Array
(
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[patent_doc_number] => 06606262
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[patent_title] => 'Magnetoresistive random access memory (MRAM) with on-chip automatic determination of optimized write current method and apparatus'
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Array
(
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[patent_doc_number] => 06584023
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[patent_issue_date] => 2003-06-24
[patent_title] => 'System for implementing a column redundancy scheme for arrays with controls that span multiple data bits'
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Array
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[patent_issue_date] => 2003-04-29
[patent_title] => 'Static RAM with optimized timing of driving control signal for sense amplifier'
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Array
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[patent_doc_number] => 20020118570
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[patent_issue_date] => 2002-08-29
[patent_title] => 'Method of read operation of nonvolatile semiconductor memory and nonvolatile semiconductor memory'
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Array
(
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Array
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[patent_title] => '4T memory with boost of stored voltage between standby and active'
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Array
(
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/034625 | Twisted bit-line compensation | Dec 26, 2001 | Issued |
Array
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Array
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Array
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Array
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