Search

Huan Hoang

Examiner (ID: 2059)

Most Active Art Unit
2827
Art Unit(s)
2511, 2827, 2818, 2154
Total Applications
3262
Issued Applications
3045
Pending Applications
111
Abandoned Applications
129

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5872734 [patent_doc_number] => 20020048187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-25 [patent_title] => 'Small size, low consumption, multilevel nonvolatile memory' [patent_app_type] => new [patent_app_number] => 09/972726 [patent_app_country] => US [patent_app_date] => 2001-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3762 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0048/20020048187.pdf [firstpage_image] =>[orig_patent_app_number] => 09972726 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/972726
Small size, low consumption, multilevel nonvolatile memory Oct 3, 2001 Issued
Array ( [id] => 1603888 [patent_doc_number] => 06434071 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-13 [patent_title] => 'Circuit and method of selectively activating feedback devices for local bit lines in a memory' [patent_app_type] => B1 [patent_app_number] => 09/971126 [patent_app_country] => US [patent_app_date] => 2001-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4284 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/434/06434071.pdf [firstpage_image] =>[orig_patent_app_number] => 09971126 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/971126
Circuit and method of selectively activating feedback devices for local bit lines in a memory Oct 3, 2001 Issued
Array ( [id] => 1504398 [patent_doc_number] => 06487139 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-26 [patent_title] => 'Memory row line driver circuit' [patent_app_type] => B1 [patent_app_number] => 09/967322 [patent_app_country] => US [patent_app_date] => 2001-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3503 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/487/06487139.pdf [firstpage_image] =>[orig_patent_app_number] => 09967322 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/967322
Memory row line driver circuit Sep 27, 2001 Issued
Array ( [id] => 1538542 [patent_doc_number] => 06490194 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-12-03 [patent_title] => 'Serial MRAM device' [patent_app_type] => B2 [patent_app_number] => 09/967662 [patent_app_country] => US [patent_app_date] => 2001-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 9 [patent_no_of_words] => 3804 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/490/06490194.pdf [firstpage_image] =>[orig_patent_app_number] => 09967662 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/967662
Serial MRAM device Sep 26, 2001 Issued
Array ( [id] => 1454335 [patent_doc_number] => 06456529 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-24 [patent_title] => 'Programmable impedance device' [patent_app_type] => B1 [patent_app_number] => 09/967513 [patent_app_country] => US [patent_app_date] => 2001-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 5682 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/456/06456529.pdf [firstpage_image] =>[orig_patent_app_number] => 09967513 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/967513
Programmable impedance device Sep 26, 2001 Issued
Array ( [id] => 5813797 [patent_doc_number] => 20020039326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-04 [patent_title] => 'Clock synchronous circuit' [patent_app_type] => new [patent_app_number] => 09/966664 [patent_app_country] => US [patent_app_date] => 2001-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 6865 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0039/20020039326.pdf [firstpage_image] =>[orig_patent_app_number] => 09966664 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/966664
Clock synchronous circuit Sep 26, 2001 Issued
Array ( [id] => 1511457 [patent_doc_number] => 06442103 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-27 [patent_title] => 'Synchronous SRAM device with late write function' [patent_app_type] => B1 [patent_app_number] => 09/963962 [patent_app_country] => US [patent_app_date] => 2001-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5010 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/442/06442103.pdf [firstpage_image] =>[orig_patent_app_number] => 09963962 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/963962
Synchronous SRAM device with late write function Sep 25, 2001 Issued
Array ( [id] => 1442575 [patent_doc_number] => 06496413 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-12-17 [patent_title] => 'Semiconductor memory device for effecting erasing operation in block unit' [patent_app_type] => B2 [patent_app_number] => 09/961429 [patent_app_country] => US [patent_app_date] => 2001-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 8632 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/496/06496413.pdf [firstpage_image] =>[orig_patent_app_number] => 09961429 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/961429
Semiconductor memory device for effecting erasing operation in block unit Sep 24, 2001 Issued
Array ( [id] => 6400248 [patent_doc_number] => 20020036914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-03-28 [patent_title] => 'Semiconductor memory device' [patent_app_type] => new [patent_app_number] => 09/963828 [patent_app_country] => US [patent_app_date] => 2001-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12719 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20020036914.pdf [firstpage_image] =>[orig_patent_app_number] => 09963828 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/963828
Semiconductor memory device Sep 24, 2001 Issued
Array ( [id] => 1427305 [patent_doc_number] => 06522589 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-18 [patent_title] => 'Semiconductor apparatus and mode setting method for semiconductor apparatus' [patent_app_type] => B1 [patent_app_number] => 09/961356 [patent_app_country] => US [patent_app_date] => 2001-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 30 [patent_no_of_words] => 21291 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/522/06522589.pdf [firstpage_image] =>[orig_patent_app_number] => 09961356 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/961356
Semiconductor apparatus and mode setting method for semiconductor apparatus Sep 24, 2001 Issued
Array ( [id] => 6400310 [patent_doc_number] => 20020036924 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-03-28 [patent_title] => 'Semiconductor device' [patent_app_type] => new [patent_app_number] => 09/957029 [patent_app_country] => US [patent_app_date] => 2001-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7854 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 294 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20020036924.pdf [firstpage_image] =>[orig_patent_app_number] => 09957029 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/957029
Semiconductor device Sep 20, 2001 Issued
Array ( [id] => 1389967 [patent_doc_number] => 06563744 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-05-13 [patent_title] => 'Semiconductor memory device' [patent_app_type] => B2 [patent_app_number] => 09/956457 [patent_app_country] => US [patent_app_date] => 2001-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 14056 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/563/06563744.pdf [firstpage_image] =>[orig_patent_app_number] => 09956457 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/956457
Semiconductor memory device Sep 19, 2001 Issued
Array ( [id] => 1603885 [patent_doc_number] => 06434068 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-13 [patent_title] => 'Nonvolatile semiconductor memory with testing circuit' [patent_app_type] => B1 [patent_app_number] => 09/956124 [patent_app_country] => US [patent_app_date] => 2001-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 14450 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/434/06434068.pdf [firstpage_image] =>[orig_patent_app_number] => 09956124 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/956124
Nonvolatile semiconductor memory with testing circuit Sep 19, 2001 Issued
Array ( [id] => 1418977 [patent_doc_number] => 06535438 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-03-18 [patent_title] => 'Semiconductor memory device adopting redundancy system' [patent_app_type] => B2 [patent_app_number] => 09/955020 [patent_app_country] => US [patent_app_date] => 2001-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 36 [patent_no_of_words] => 9488 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/535/06535438.pdf [firstpage_image] =>[orig_patent_app_number] => 09955020 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/955020
Semiconductor memory device adopting redundancy system Sep 18, 2001 Issued
Array ( [id] => 1600069 [patent_doc_number] => 06493260 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-12-10 [patent_title] => 'Nonvolatile memory device, having parts with different access time, reliability, and capacity' [patent_app_type] => B2 [patent_app_number] => 09/957628 [patent_app_country] => US [patent_app_date] => 2001-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3944 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/493/06493260.pdf [firstpage_image] =>[orig_patent_app_number] => 09957628 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/957628
Nonvolatile memory device, having parts with different access time, reliability, and capacity Sep 18, 2001 Issued
Array ( [id] => 1354167 [patent_doc_number] => 06587380 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-07-01 [patent_title] => 'Programming method for non-volatile semiconductor memory device' [patent_app_type] => B2 [patent_app_number] => 09/955158 [patent_app_country] => US [patent_app_date] => 2001-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 27 [patent_no_of_words] => 7688 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/587/06587380.pdf [firstpage_image] =>[orig_patent_app_number] => 09955158 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/955158
Programming method for non-volatile semiconductor memory device Sep 18, 2001 Issued
Array ( [id] => 1578312 [patent_doc_number] => 06469933 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-10-22 [patent_title] => 'Flash memory device capable of preventing program disturb and method for programming the same' [patent_app_type] => B2 [patent_app_number] => 09/952628 [patent_app_country] => US [patent_app_date] => 2001-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 3258 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/469/06469933.pdf [firstpage_image] =>[orig_patent_app_number] => 09952628 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/952628
Flash memory device capable of preventing program disturb and method for programming the same Sep 12, 2001 Issued
Array ( [id] => 1482930 [patent_doc_number] => 06452848 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-17 [patent_title] => 'Programmable built-in self test (BIST) data generator for semiconductor memory devices' [patent_app_type] => B1 [patent_app_number] => 09/950864 [patent_app_country] => US [patent_app_date] => 2001-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3469 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/452/06452848.pdf [firstpage_image] =>[orig_patent_app_number] => 09950864 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/950864
Programmable built-in self test (BIST) data generator for semiconductor memory devices Sep 11, 2001 Issued
Array ( [id] => 6207221 [patent_doc_number] => 20020071307 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-13 [patent_title] => 'Method and circuit for programming a multilevel non-volatile memory' [patent_app_type] => new [patent_app_number] => 09/952957 [patent_app_country] => US [patent_app_date] => 2001-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3385 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0071/20020071307.pdf [firstpage_image] =>[orig_patent_app_number] => 09952957 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/952957
Method and circuit for programming a multilevel non-volatile memory Sep 11, 2001 Issued
Array ( [id] => 6534546 [patent_doc_number] => 20020110034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-15 [patent_title] => 'Input-output circuit and current control circuit of semiconductor memory device' [patent_app_type] => new [patent_app_number] => 09/950962 [patent_app_country] => US [patent_app_date] => 2001-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2397 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20020110034.pdf [firstpage_image] =>[orig_patent_app_number] => 09950962 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/950962
Input-output circuit and current control circuit of semiconductor memory device Sep 11, 2001 Abandoned
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