
Huan Hoang
Examiner (ID: 2059)
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2511, 2827, 2818, 2154 |
| Total Applications | 3262 |
| Issued Applications | 3045 |
| Pending Applications | 111 |
| Abandoned Applications | 129 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4290913
[patent_doc_number] => 06282119
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-08-28
[patent_title] => 'Mixed program and sense architecture using dual-step voltage scheme in multi-level data storage in flash memories'
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[patent_app_number] => 9/585422
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[pdf_file] => patents/06/282/06282119.pdf
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Array
(
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[patent_doc_number] => 06195284
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[patent_kind] => NA
[patent_issue_date] => 2001-02-27
[patent_title] => 'Semiconductor memory device'
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Array
(
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[patent_issue_date] => 2002-03-26
[patent_title] => 'Methods and apparatus for reading memory device register data'
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Array
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[patent_kind] => B1
[patent_issue_date] => 2002-04-02
[patent_title] => 'Circuit configuration for programming an electrically programmable element'
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Array
(
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[patent_doc_number] => 06262921
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[patent_issue_date] => 2001-07-17
[patent_title] => 'Delay-locked loop with binary-coupled capacitor'
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Array
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[patent_title] => 'Delay-locked loop with binary-coupled capacitor'
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Array
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[patent_title] => 'Shift register clock scheme'
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Array
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[patent_issue_date] => 2002-06-04
[patent_title] => 'Electronically-eraseable programmable read-only memory having reduced-page-size program and erase'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/564324 | Electronically-eraseable programmable read-only memory having reduced-page-size program and erase | May 2, 2000 | Issued |
Array
(
[id] => 1499245
[patent_doc_number] => 06404687
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[patent_kind] => B2
[patent_issue_date] => 2002-06-11
[patent_title] => 'Semiconductor integrated circuit having a self-refresh function'
[patent_app_type] => B2
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Array
(
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[patent_doc_number] => 06424585
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[patent_title] => 'Semiconductor memory device with a voltage down converter stably generating an internal down-converted voltage'
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Array
(
[id] => 4273148
[patent_doc_number] => 06205086
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[patent_issue_date] => 2001-03-20
[patent_title] => 'Phase control circuit, semiconductor device and semiconductor memory'
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Array
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[id] => 4273501
[patent_doc_number] => 06259645
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Array
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[patent_title] => 'Redundant memory cell for dynamic random access memories having twisted bit line architectures'
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Array
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Array
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Array
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Array
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