Huan Hoang

Array ( [id] => 4165625 [patent_doc_number] => 06125053 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-26 [patent_title] => 'Semiconductor structure for long-term learning' [patent_app_type] => 1 [patent_app_number] => 9/201677 [patent_app_country] => US [patent_app_date] => 1998-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 6583 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/125/06125053.pdf [firstpage_image] =>[orig_patent_app_number] => 201677 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4285005 [patent_doc_number] => 06246624 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-12 [patent_title] => 'Voltage detection circuit power-on/off reset circuit and semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/198726 [patent_app_country] => US [patent_app_date] => 1998-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 25 [patent_no_of_words] => 8360 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/246/06246624.pdf [firstpage_image] =>[orig_patent_app_number] => 198726 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4116615 [patent_doc_number] => 06023437 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-08 [patent_title] => 'Semiconductor memory device capable of reducing a precharge time' [patent_app_type] => 1 [patent_app_number] => 9/196212 [patent_app_country] => US [patent_app_date] => 1998-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3438 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/023/06023437.pdf [firstpage_image] =>[orig_patent_app_number] => 196212 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4247379 [patent_doc_number] => 06118710 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-12 [patent_title] => 'Semiconductor memory device including disturb refresh test circuit' [patent_app_type] => 1 [patent_app_number] => 9/195038 [patent_app_country] => US [patent_app_date] => 1998-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4144 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/118/06118710.pdf [firstpage_image] =>[orig_patent_app_number] => 195038 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3962429 [patent_doc_number] => 05999468 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-07 [patent_title] => 'Method and system for identifying a memory module configuration' [patent_app_type] => 1 [patent_app_number] => 9/193804 [patent_app_country] => US [patent_app_date] => 1998-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4800 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/999/05999468.pdf [firstpage_image] =>[orig_patent_app_number] => 193804 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4230529 [patent_doc_number] => 06040996 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-21 [patent_title] => 'Constant current programming waveforms for non-volatile memories' [patent_app_type] => 1 [patent_app_number] => 9/192337 [patent_app_country] => US [patent_app_date] => 1998-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 24 [patent_no_of_words] => 7240 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/040/06040996.pdf [firstpage_image] =>[orig_patent_app_number] => 192337 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4202289 [patent_doc_number] => 06130854 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-10 [patent_title] => 'Programmable address decoder for field programmable memory array' [patent_app_type] => 1 [patent_app_number] => 9/190871 [patent_app_country] => US [patent_app_date] => 1998-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 52 [patent_no_of_words] => 24703 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/130/06130854.pdf [firstpage_image] =>[orig_patent_app_number] => 190871 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4204856 [patent_doc_number] => 06044031 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-28 [patent_title] => 'Programmable bit line drive modes for memory arrays' [patent_app_type] => 1 [patent_app_number] => 9/190919 [patent_app_country] => US [patent_app_date] => 1998-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 52 [patent_no_of_words] => 24695 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/044/06044031.pdf [firstpage_image] =>[orig_patent_app_number] => 190919 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4116394 [patent_doc_number] => 06023421 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-08 [patent_title] => 'Selective connectivity between memory sub-arrays and a hierarchical bit line structure in a memory array' [patent_app_type] => 1 [patent_app_number] => 9/190920 [patent_app_country] => US [patent_app_date] => 1998-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 52 [patent_no_of_words] => 24704 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/023/06023421.pdf [firstpage_image] =>[orig_patent_app_number] => 190920 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4246249 [patent_doc_number] => 06075745 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-13 [patent_title] => 'Field programmable memory array' [patent_app_type] => 1 [patent_app_number] => 9/190628 [patent_app_country] => US [patent_app_date] => 1998-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 52 [patent_no_of_words] => 24685 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/075/06075745.pdf [firstpage_image] =>[orig_patent_app_number] => 190628 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4251829 [patent_doc_number] => 06091645 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-18 [patent_title] => 'Programmable read ports and write ports for I/O buses in a field programmable memory array' [patent_app_type] => 1 [patent_app_number] => 9/190681 [patent_app_country] => US [patent_app_date] => 1998-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 52 [patent_no_of_words] => 24708 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/091/06091645.pdf [firstpage_image] =>[orig_patent_app_number] => 190681 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4192235 [patent_doc_number] => 06038192 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-14 [patent_title] => 'Memory cells for field programmable memory array' [patent_app_type] => 1 [patent_app_number] => 9/189391 [patent_app_country] => US [patent_app_date] => 1998-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 52 [patent_no_of_words] => 24699 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/038/06038192.pdf [firstpage_image] =>[orig_patent_app_number] => 189391 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4011909 [patent_doc_number] => 05986927 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-16 [patent_title] => 'Autozeroing floating-gate amplifier' [patent_app_type] => 1 [patent_app_number] => 9/189595 [patent_app_country] => US [patent_app_date] => 1998-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 39 [patent_no_of_words] => 13278 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/986/05986927.pdf [firstpage_image] =>[orig_patent_app_number] => 189595 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4247341 [patent_doc_number] => 06118707 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-12 [patent_title] => 'Method of operating a field programmable memory array with a field programmable gate array' [patent_app_type] => 1 [patent_app_number] => 9/189750 [patent_app_country] => US [patent_app_date] => 1998-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 60 [patent_no_of_words] => 24698 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/118/06118707.pdf [firstpage_image] =>[orig_patent_app_number] => 189750 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4230592 [patent_doc_number] => 06041000 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-21 [patent_title] => 'Initialization for fuse control' [patent_app_type] => 1 [patent_app_number] => 9/183840 [patent_app_country] => US [patent_app_date] => 1998-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 5563 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/041/06041000.pdf [firstpage_image] =>[orig_patent_app_number] => 183840 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4202059 [patent_doc_number] => 06130839 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-10 [patent_title] => 'Methods of programming, erasing and reading a flash memory' [patent_app_type] => 1 [patent_app_number] => 9/179738 [patent_app_country] => US [patent_app_date] => 1998-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 3533 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/130/06130839.pdf [firstpage_image] =>[orig_patent_app_number] => 179738 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4246180 [patent_doc_number] => 06075740 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-13 [patent_title] => 'Method and apparatus for increasing the time available for refresh for 1-t SRAM compatible devices' [patent_app_type] => 1 [patent_app_number] => 9/181840 [patent_app_country] => US [patent_app_date] => 1998-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7620 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/075/06075740.pdf [firstpage_image] =>[orig_patent_app_number] => 181840 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4140132 [patent_doc_number] => 06128222 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-03 [patent_title] => 'Non-volatile memories programmable by \"hot carrier\" tunnel effect and erasable by tunnel effect' [patent_app_type] => 1 [patent_app_number] => 9/173136 [patent_app_country] => US [patent_app_date] => 1998-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 6043 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/128/06128222.pdf [firstpage_image] =>[orig_patent_app_number] => 173136 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4110934 [patent_doc_number] => 06067270 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-23 [patent_title] => 'Multi-bank memory devices having improved data transfer capability and methods of operating same' [patent_app_type] => 1 [patent_app_number] => 9/170940 [patent_app_country] => US [patent_app_date] => 1998-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4287 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/067/06067270.pdf [firstpage_image] =>[orig_patent_app_number] => 170940 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4096227 [patent_doc_number] => 06018477 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-25 [patent_title] => 'Intelligent refreshing method and apparatus for increasing multi-level non-volatile memory charge retention reliability' [patent_app_type] => 1 [patent_app_number] => 9/169037 [patent_app_country] => US [patent_app_date] => 1998-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2772 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/018/06018477.pdf [firstpage_image] =>[orig_patent_app_number] => 169037 [rel_patent_id] =>[rel_patent_doc_number] =>)