Search

Huan Hoang

Examiner (ID: 2059)

Most Active Art Unit
2827
Art Unit(s)
2511, 2827, 2818, 2154
Total Applications
3262
Issued Applications
3045
Pending Applications
111
Abandoned Applications
129

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4417397 [patent_doc_number] => 06172908 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-09 [patent_title] => 'Controlled hot-electron writing method for non-volatile memory cells' [patent_app_type] => 1 [patent_app_number] => 9/169239 [patent_app_country] => US [patent_app_date] => 1998-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 4048 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/172/06172908.pdf [firstpage_image] =>[orig_patent_app_number] => 169239 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/169239
Controlled hot-electron writing method for non-volatile memory cells Oct 7, 1998 Issued
Array ( [id] => 4263073 [patent_doc_number] => 06222790 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-24 [patent_title] => 'Semiconductor memory device in which data are read and written asynchronously with application of address signal' [patent_app_type] => 1 [patent_app_number] => 9/166586 [patent_app_country] => US [patent_app_date] => 1998-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 24 [patent_no_of_words] => 7756 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/222/06222790.pdf [firstpage_image] =>[orig_patent_app_number] => 166586 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/166586
Semiconductor memory device in which data are read and written asynchronously with application of address signal Oct 5, 1998 Issued
Array ( [id] => 4250430 [patent_doc_number] => 06081448 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-27 [patent_title] => 'Method and device for analog programming of flash EEPROM memory cells with autoverify' [patent_app_type] => 1 [patent_app_number] => 9/162639 [patent_app_country] => US [patent_app_date] => 1998-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3576 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/081/06081448.pdf [firstpage_image] =>[orig_patent_app_number] => 162639 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/162639
Method and device for analog programming of flash EEPROM memory cells with autoverify Sep 27, 1998 Issued
Array ( [id] => 4367843 [patent_doc_number] => 06201734 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-13 [patent_title] => 'Programmable impedance device' [patent_app_type] => 1 [patent_app_number] => 9/159848 [patent_app_country] => US [patent_app_date] => 1998-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 5663 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/201/06201734.pdf [firstpage_image] =>[orig_patent_app_number] => 159848 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/159848
Programmable impedance device Sep 24, 1998 Issued
Array ( [id] => 4193898 [patent_doc_number] => 06021069 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-01 [patent_title] => 'Bit latch scheme for parallel program verify in floating gate memory device' [patent_app_type] => 1 [patent_app_number] => 9/160637 [patent_app_country] => US [patent_app_date] => 1998-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9100 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/021/06021069.pdf [firstpage_image] =>[orig_patent_app_number] => 160637 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/160637
Bit latch scheme for parallel program verify in floating gate memory device Sep 23, 1998 Issued
Array ( [id] => 4229838 [patent_doc_number] => 06111793 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-29 [patent_title] => 'Semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/158551 [patent_app_country] => US [patent_app_date] => 1998-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 6657 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/111/06111793.pdf [firstpage_image] =>[orig_patent_app_number] => 158551 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/158551
Semiconductor device Sep 21, 1998 Issued
Array ( [id] => 4093260 [patent_doc_number] => 06055175 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-25 [patent_title] => 'Nonvolatile ferroelectric memory' [patent_app_type] => 1 [patent_app_number] => 9/157947 [patent_app_country] => US [patent_app_date] => 1998-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4223 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/055/06055175.pdf [firstpage_image] =>[orig_patent_app_number] => 157947 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/157947
Nonvolatile ferroelectric memory Sep 21, 1998 Issued
Array ( [id] => 4047831 [patent_doc_number] => 05995416 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-30 [patent_title] => 'Method and circuit for the generation of programming and erasure voltage in a non-volatile memory' [patent_app_type] => 1 [patent_app_number] => 9/156945 [patent_app_country] => US [patent_app_date] => 1998-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3777 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/995/05995416.pdf [firstpage_image] =>[orig_patent_app_number] => 156945 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/156945
Method and circuit for the generation of programming and erasure voltage in a non-volatile memory Sep 17, 1998 Issued
Array ( [id] => 3937598 [patent_doc_number] => 05946269 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-31 [patent_title] => 'Synchronous RAM controlling device and method' [patent_app_type] => 1 [patent_app_number] => 9/156345 [patent_app_country] => US [patent_app_date] => 1998-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 22 [patent_no_of_words] => 5097 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/946/05946269.pdf [firstpage_image] =>[orig_patent_app_number] => 156345 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/156345
Synchronous RAM controlling device and method Sep 17, 1998 Issued
Array ( [id] => 4102608 [patent_doc_number] => 06134144 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-17 [patent_title] => 'Flash memory array' [patent_app_type] => 1 [patent_app_number] => 9/153843 [patent_app_country] => US [patent_app_date] => 1998-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 28 [patent_no_of_words] => 11684 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 293 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/134/06134144.pdf [firstpage_image] =>[orig_patent_app_number] => 153843 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/153843
Flash memory array Sep 14, 1998 Issued
Array ( [id] => 3963553 [patent_doc_number] => 05978246 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-02 [patent_title] => 'Content addressable memory device' [patent_app_type] => 1 [patent_app_number] => 9/149439 [patent_app_country] => US [patent_app_date] => 1998-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4691 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/978/05978246.pdf [firstpage_image] =>[orig_patent_app_number] => 149439 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/149439
Content addressable memory device Sep 7, 1998 Issued
Array ( [id] => 4115090 [patent_doc_number] => 06052321 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-18 [patent_title] => 'Circuit and method for performing test on memory array cells using external sense amplifier reference current' [patent_app_type] => 1 [patent_app_number] => 9/146295 [patent_app_country] => US [patent_app_date] => 1998-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 11987 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/052/06052321.pdf [firstpage_image] =>[orig_patent_app_number] => 146295 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/146295
Circuit and method for performing test on memory array cells using external sense amplifier reference current Sep 2, 1998 Issued
Array ( [id] => 3937433 [patent_doc_number] => 05946259 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-31 [patent_title] => 'Voltage generator methods and apparatus' [patent_app_type] => 1 [patent_app_number] => 9/144736 [patent_app_country] => US [patent_app_date] => 1998-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4356 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/946/05946259.pdf [firstpage_image] =>[orig_patent_app_number] => 144736 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/144736
Voltage generator methods and apparatus Aug 31, 1998 Issued
Array ( [id] => 4096911 [patent_doc_number] => 06026032 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-15 [patent_title] => 'High speed data buffer using a virtual first-in-first-out register' [patent_app_type] => 1 [patent_app_number] => 9/143744 [patent_app_country] => US [patent_app_date] => 1998-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3722 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 321 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/026/06026032.pdf [firstpage_image] =>[orig_patent_app_number] => 143744 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/143744
High speed data buffer using a virtual first-in-first-out register Aug 30, 1998 Issued
Array ( [id] => 4374294 [patent_doc_number] => 06256256 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-03 [patent_title] => 'Dual port random access memories and systems using the same' [patent_app_type] => 1 [patent_app_number] => 9/141490 [patent_app_country] => US [patent_app_date] => 1998-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 21 [patent_no_of_words] => 8268 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/256/06256256.pdf [firstpage_image] =>[orig_patent_app_number] => 141490 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/141490
Dual port random access memories and systems using the same Aug 27, 1998 Issued
Array ( [id] => 3970145 [patent_doc_number] => 05936895 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-10 [patent_title] => 'Memory device tracking circuit' [patent_app_type] => 1 [patent_app_number] => 9/139900 [patent_app_country] => US [patent_app_date] => 1998-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 3098 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/936/05936895.pdf [firstpage_image] =>[orig_patent_app_number] => 139900 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/139900
Memory device tracking circuit Aug 25, 1998 Issued
Array ( [id] => 4131534 [patent_doc_number] => 06072747 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-06 [patent_title] => 'High-speed current setting systems and methods for integrated circuit output drivers' [patent_app_type] => 1 [patent_app_number] => 9/137543 [patent_app_country] => US [patent_app_date] => 1998-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3376 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/072/06072747.pdf [firstpage_image] =>[orig_patent_app_number] => 137543 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/137543
High-speed current setting systems and methods for integrated circuit output drivers Aug 19, 1998 Issued
Array ( [id] => 4147703 [patent_doc_number] => 06122191 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-19 [patent_title] => 'Semiconductor non-volatile device including embedded non-volatile elements' [patent_app_type] => 1 [patent_app_number] => 9/136694 [patent_app_country] => US [patent_app_date] => 1998-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 25 [patent_no_of_words] => 21657 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/122/06122191.pdf [firstpage_image] =>[orig_patent_app_number] => 136694 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/136694
Semiconductor non-volatile device including embedded non-volatile elements Aug 18, 1998 Issued
Array ( [id] => 4233970 [patent_doc_number] => 06011721 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-04 [patent_title] => 'Method for sensing state of erasure of a flash electrically erasable programmable read-only memory (EEPROM)' [patent_app_type] => 1 [patent_app_number] => 9/132347 [patent_app_country] => US [patent_app_date] => 1998-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 6332 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/011/06011721.pdf [firstpage_image] =>[orig_patent_app_number] => 132347 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/132347
Method for sensing state of erasure of a flash electrically erasable programmable read-only memory (EEPROM) Aug 11, 1998 Issued
Array ( [id] => 4418609 [patent_doc_number] => 06310815 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-30 [patent_title] => 'Multi-bank semiconductor memory device suitable for integration with logic' [patent_app_type] => 1 [patent_app_number] => 9/131346 [patent_app_country] => US [patent_app_date] => 1998-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 56 [patent_no_of_words] => 29389 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/310/06310815.pdf [firstpage_image] =>[orig_patent_app_number] => 131346 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/131346
Multi-bank semiconductor memory device suitable for integration with logic Aug 6, 1998 Issued
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