
Huan Hoang
Examiner (ID: 2059)
| Most Active Art Unit | 2827 |
| Art Unit(s) | 2511, 2827, 2818, 2154 |
| Total Applications | 3262 |
| Issued Applications | 3045 |
| Pending Applications | 111 |
| Abandoned Applications | 129 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3704309
[patent_doc_number] => 05680355
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-10-21
[patent_title] => 'Semiconductor storage apparatus'
[patent_app_type] => 1
[patent_app_number] => 8/621179
[patent_app_country] => US
[patent_app_date] => 1996-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 12
[patent_no_of_words] => 3009
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 279
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/680/05680355.pdf
[firstpage_image] =>[orig_patent_app_number] => 621179
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/621179 | Semiconductor storage apparatus | Mar 20, 1996 | Issued |
Array
(
[id] => 3797864
[patent_doc_number] => 05822238
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-13
[patent_title] => 'Semiconductor memory'
[patent_app_type] => 1
[patent_app_number] => 8/618780
[patent_app_country] => US
[patent_app_date] => 1996-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 14
[patent_no_of_words] => 5250
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/822/05822238.pdf
[firstpage_image] =>[orig_patent_app_number] => 618780
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/618780 | Semiconductor memory | Mar 19, 1996 | Issued |
Array
(
[id] => 3657961
[patent_doc_number] => 05640367
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-06-17
[patent_title] => 'Semiconductor memory device and method of fabricating the same'
[patent_app_type] => 1
[patent_app_number] => 8/609147
[patent_app_country] => US
[patent_app_date] => 1996-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 62
[patent_figures_cnt] => 62
[patent_no_of_words] => 24623
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 175
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/640/05640367.pdf
[firstpage_image] =>[orig_patent_app_number] => 609147
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/609147 | Semiconductor memory device and method of fabricating the same | Feb 27, 1996 | Issued |
Array
(
[id] => 3740830
[patent_doc_number] => 05666304
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-09-09
[patent_title] => 'Semiconductor memory device and method of fabricating the same'
[patent_app_type] => 1
[patent_app_number] => 8/608194
[patent_app_country] => US
[patent_app_date] => 1996-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 62
[patent_figures_cnt] => 62
[patent_no_of_words] => 24600
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/666/05666304.pdf
[firstpage_image] =>[orig_patent_app_number] => 608194
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/608194 | Semiconductor memory device and method of fabricating the same | Feb 27, 1996 | Issued |
Array
(
[id] => 3890188
[patent_doc_number] => 05729497
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-17
[patent_title] => 'Method of using parity and ECC bits to increase the yield of non-parity ECC devices'
[patent_app_type] => 1
[patent_app_number] => 8/607704
[patent_app_country] => US
[patent_app_date] => 1996-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 17
[patent_no_of_words] => 3567
[patent_no_of_claims] => 21
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/729/05729497.pdf
[firstpage_image] =>[orig_patent_app_number] => 607704
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/607704 | Method of using parity and ECC bits to increase the yield of non-parity ECC devices | Feb 26, 1996 | Issued |
Array
(
[id] => 3780039
[patent_doc_number] => 05850360
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-15
[patent_title] => 'High-voltage N-channel MOS transistor and associated manufacturing process'
[patent_app_type] => 1
[patent_app_number] => 8/607779
[patent_app_country] => US
[patent_app_date] => 1996-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 8
[patent_no_of_words] => 1697
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 177
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/850/05850360.pdf
[firstpage_image] =>[orig_patent_app_number] => 607779
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/607779 | High-voltage N-channel MOS transistor and associated manufacturing process | Feb 26, 1996 | Issued |
Array
(
[id] => 3703846
[patent_doc_number] => 05661690
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-08-26
[patent_title] => 'Circuit and method for performing tests on memory array cells using external sense amplifier reference current'
[patent_app_type] => 1
[patent_app_number] => 8/607708
[patent_app_country] => US
[patent_app_date] => 1996-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 11990
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/661/05661690.pdf
[firstpage_image] =>[orig_patent_app_number] => 607708
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/607708 | Circuit and method for performing tests on memory array cells using external sense amplifier reference current | Feb 26, 1996 | Issued |
Array
(
[id] => 3715925
[patent_doc_number] => 05654926
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-08-05
[patent_title] => 'Semiconductor memory device'
[patent_app_type] => 1
[patent_app_number] => 8/605379
[patent_app_country] => US
[patent_app_date] => 1996-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 38
[patent_no_of_words] => 6202
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 288
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/654/05654926.pdf
[firstpage_image] =>[orig_patent_app_number] => 605379
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/605379 | Semiconductor memory device | Feb 21, 1996 | Issued |
Array
(
[id] => 3697845
[patent_doc_number] => 05644545
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-07-01
[patent_title] => 'Bimodal refresh circuit and method for using same to reduce standby current and enhance yields of dynamic memory products'
[patent_app_type] => 1
[patent_app_number] => 8/601179
[patent_app_country] => US
[patent_app_date] => 1996-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 4118
[patent_no_of_claims] => 17
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[patent_words_short_claim] => 100
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/644/05644545.pdf
[firstpage_image] =>[orig_patent_app_number] => 601179
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/601179 | Bimodal refresh circuit and method for using same to reduce standby current and enhance yields of dynamic memory products | Feb 13, 1996 | Issued |
Array
(
[id] => 3659031
[patent_doc_number] => 05684734
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-04
[patent_title] => 'Semiconductor element and process for manufacturing the same'
[patent_app_type] => 1
[patent_app_number] => 8/600678
[patent_app_country] => US
[patent_app_date] => 1996-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 55
[patent_no_of_words] => 12909
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 15
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/684/05684734.pdf
[firstpage_image] =>[orig_patent_app_number] => 600678
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/600678 | Semiconductor element and process for manufacturing the same | Feb 12, 1996 | Issued |
| 08/598581 | SEMICONDUCTOR MEMORY DEVICE HAVING HIERARCHICAL BIT LINE STRUCTURE | Feb 11, 1996 | Abandoned |
Array
(
[id] => 3638927
[patent_doc_number] => 05687127
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-11
[patent_title] => 'Sense amplifier of semiconductor memory having an increased reading speed'
[patent_app_type] => 1
[patent_app_number] => 8/598978
[patent_app_country] => US
[patent_app_date] => 1996-02-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6177
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/687/05687127.pdf
[firstpage_image] =>[orig_patent_app_number] => 598978
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/598978 | Sense amplifier of semiconductor memory having an increased reading speed | Feb 8, 1996 | Issued |
Array
(
[id] => 3733458
[patent_doc_number] => 05701270
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-12-23
[patent_title] => 'Single chip controller-memory device with interbank cell replacement capability and a memory architecture and methods suitble for implementing the same'
[patent_app_type] => 1
[patent_app_number] => 8/595236
[patent_app_country] => US
[patent_app_date] => 1996-02-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/701/05701270.pdf
[firstpage_image] =>[orig_patent_app_number] => 595236
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/595236 | Single chip controller-memory device with interbank cell replacement capability and a memory architecture and methods suitble for implementing the same | Jan 31, 1996 | Issued |
Array
(
[id] => 3534668
[patent_doc_number] => 05504710
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-04-02
[patent_title] => 'Semiconductor memory device having a bit control circuit'
[patent_app_type] => 1
[patent_app_number] => 8/378974
[patent_app_country] => US
[patent_app_date] => 1996-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 8374
[patent_no_of_claims] => 3
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[pdf_file] => patents/05/504/05504710.pdf
[firstpage_image] =>[orig_patent_app_number] => 378974
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/378974 | Semiconductor memory device having a bit control circuit | Jan 26, 1996 | Issued |
| 08/589223 | SEMICONDUCTOR MEMORY DEVICE IN WHICH DATA ARE READ AND WRITTEN ASYNCHRONOUSLY WITH APPLICATION OF ADDRESS SIGNAL | Jan 21, 1996 | Abandoned |
Array
(
[id] => 3618046
[patent_doc_number] => 05590086
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-12-31
[patent_title] => 'Semiconductor memory having a plurality of I/O buses'
[patent_app_type] => 1
[patent_app_number] => 8/580481
[patent_app_country] => US
[patent_app_date] => 1995-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 66
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/590/05590086.pdf
[firstpage_image] =>[orig_patent_app_number] => 580481
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/580481 | Semiconductor memory having a plurality of I/O buses | Dec 28, 1995 | Issued |
Array
(
[id] => 3741304
[patent_doc_number] => 05636171
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-06-03
[patent_title] => 'Semiconductor memory device having low power self refresh and burn-in functions'
[patent_app_type] => 1
[patent_app_number] => 8/580645
[patent_app_country] => US
[patent_app_date] => 1995-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => patents/05/636/05636171.pdf
[firstpage_image] =>[orig_patent_app_number] => 580645
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/580645 | Semiconductor memory device having low power self refresh and burn-in functions | Dec 28, 1995 | Issued |
Array
(
[id] => 3671579
[patent_doc_number] => 05657278
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-08-12
[patent_title] => 'Restore circuit for semiconductor memory device and structure thereof'
[patent_app_type] => 1
[patent_app_number] => 8/579678
[patent_app_country] => US
[patent_app_date] => 1995-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/05/657/05657278.pdf
[firstpage_image] =>[orig_patent_app_number] => 579678
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/579678 | Restore circuit for semiconductor memory device and structure thereof | Dec 27, 1995 | Issued |
Array
(
[id] => 3712439
[patent_doc_number] => 05646880
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-07-08
[patent_title] => 'Semiconductor memory device for reducing operating power consumption amount'
[patent_app_type] => 1
[patent_app_number] => 8/579580
[patent_app_country] => US
[patent_app_date] => 1995-12-26
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/646/05646880.pdf
[firstpage_image] =>[orig_patent_app_number] => 579580
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/579580 | Semiconductor memory device for reducing operating power consumption amount | Dec 25, 1995 | Issued |
Array
(
[id] => 3703736
[patent_doc_number] => 05661684
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-08-26
[patent_title] => 'Differential sense amplifier'
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[patent_app_number] => 8/577177
[patent_app_country] => US
[patent_app_date] => 1995-12-22
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[pdf_file] => patents/05/661/05661684.pdf
[firstpage_image] =>[orig_patent_app_number] => 577177
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/577177 | Differential sense amplifier | Dec 21, 1995 | Issued |