Search

Huan Hoang

Examiner (ID: 2059)

Most Active Art Unit
2827
Art Unit(s)
2511, 2827, 2818, 2154
Total Applications
3262
Issued Applications
3045
Pending Applications
111
Abandoned Applications
129

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3612826 [patent_doc_number] => 05579257 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-26 [patent_title] => 'Method for reading and restoring data in a data storage element' [patent_app_type] => 1 [patent_app_number] => 8/522477 [patent_app_country] => US [patent_app_date] => 1995-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 8238 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/579/05579257.pdf [firstpage_image] =>[orig_patent_app_number] => 522477 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/522477
Method for reading and restoring data in a data storage element Aug 30, 1995 Issued
Array ( [id] => 3657149 [patent_doc_number] => 05629896 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-13 [patent_title] => 'Write controlled address buffer' [patent_app_type] => 1 [patent_app_number] => 8/521800 [patent_app_country] => US [patent_app_date] => 1995-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 3092 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/629/05629896.pdf [firstpage_image] =>[orig_patent_app_number] => 521800 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/521800
Write controlled address buffer Aug 30, 1995 Issued
Array ( [id] => 3671735 [patent_doc_number] => 05657289 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-12 [patent_title] => 'Expandable data width SAM for a multiport RAM' [patent_app_type] => 1 [patent_app_number] => 8/511778 [patent_app_country] => US [patent_app_date] => 1995-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 4192 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/657/05657289.pdf [firstpage_image] =>[orig_patent_app_number] => 511778 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/511778
Expandable data width SAM for a multiport RAM Aug 29, 1995 Issued
Array ( [id] => 3519072 [patent_doc_number] => 05587956 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-24 [patent_title] => 'Semiconductor memory device having function of generating boosted potential' [patent_app_type] => 1 [patent_app_number] => 8/516077 [patent_app_country] => US [patent_app_date] => 1995-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 5271 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/587/05587956.pdf [firstpage_image] =>[orig_patent_app_number] => 516077 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/516077
Semiconductor memory device having function of generating boosted potential Aug 16, 1995 Issued
Array ( [id] => 3753315 [patent_doc_number] => 05754478 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-19 [patent_title] => 'Fast, low power, write scheme for memory circuits using pulsed off isolation device' [patent_app_type] => 1 [patent_app_number] => 8/515864 [patent_app_country] => US [patent_app_date] => 1995-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6794 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/754/05754478.pdf [firstpage_image] =>[orig_patent_app_number] => 515864 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/515864
Fast, low power, write scheme for memory circuits using pulsed off isolation device Aug 15, 1995 Issued
Array ( [id] => 3664551 [patent_doc_number] => 05623449 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-22 [patent_title] => 'Flag detection for first-in-first-out memories' [patent_app_type] => 1 [patent_app_number] => 8/514199 [patent_app_country] => US [patent_app_date] => 1995-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2233 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/623/05623449.pdf [firstpage_image] =>[orig_patent_app_number] => 514199 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/514199
Flag detection for first-in-first-out memories Aug 10, 1995 Issued
Array ( [id] => 3697859 [patent_doc_number] => 05644546 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-01 [patent_title] => 'MOS static RAM with improved soft error resistance; high-level supply voltage drop detection circuit and complementary signal transition detection circuit for the same; and semiconductor device with improved intersignal time margin' [patent_app_type] => 1 [patent_app_number] => 8/513641 [patent_app_country] => US [patent_app_date] => 1995-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 90 [patent_no_of_words] => 17884 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/644/05644546.pdf [firstpage_image] =>[orig_patent_app_number] => 513641 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/513641
MOS static RAM with improved soft error resistance; high-level supply voltage drop detection circuit and complementary signal transition detection circuit for the same; and semiconductor device with improved intersignal time margin Aug 9, 1995 Issued
Array ( [id] => 3703198 [patent_doc_number] => 05650961 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-22 [patent_title] => 'Cell characteristic measuring circuit for a nonvolatile semiconductor memory device and cell characteristic measuring method' [patent_app_type] => 1 [patent_app_number] => 8/512996 [patent_app_country] => US [patent_app_date] => 1995-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 7457 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/650/05650961.pdf [firstpage_image] =>[orig_patent_app_number] => 512996 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/512996
Cell characteristic measuring circuit for a nonvolatile semiconductor memory device and cell characteristic measuring method Aug 8, 1995 Issued
Array ( [id] => 3671457 [patent_doc_number] => 05657269 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-12 [patent_title] => 'Semiconductor storage device having address-transition detecting circuit and sense-determination detecting circuit' [patent_app_type] => 1 [patent_app_number] => 8/512679 [patent_app_country] => US [patent_app_date] => 1995-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3357 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/657/05657269.pdf [firstpage_image] =>[orig_patent_app_number] => 512679 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/512679
Semiconductor storage device having address-transition detecting circuit and sense-determination detecting circuit Aug 7, 1995 Issued
Array ( [id] => 3699210 [patent_doc_number] => 05604709 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-02-18 [patent_title] => 'Persistent data storage which utilizes a shared power supply' [patent_app_type] => 1 [patent_app_number] => 8/512180 [patent_app_country] => US [patent_app_date] => 1995-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2602 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/604/05604709.pdf [firstpage_image] =>[orig_patent_app_number] => 512180 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/512180
Persistent data storage which utilizes a shared power supply Aug 6, 1995 Issued
Array ( [id] => 3631036 [patent_doc_number] => 05689460 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-18 [patent_title] => 'Semiconductor memory device with a voltage down converter stably generating an internal down-converted voltage' [patent_app_type] => 1 [patent_app_number] => 8/511497 [patent_app_country] => US [patent_app_date] => 1995-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 95 [patent_figures_cnt] => 147 [patent_no_of_words] => 80983 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 23 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/689/05689460.pdf [firstpage_image] =>[orig_patent_app_number] => 511497 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/511497
Semiconductor memory device with a voltage down converter stably generating an internal down-converted voltage Aug 3, 1995 Issued
Array ( [id] => 3553624 [patent_doc_number] => 05555209 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-10 [patent_title] => 'Circuit for latching data signals from DRAM memory' [patent_app_type] => 1 [patent_app_number] => 8/510376 [patent_app_country] => US [patent_app_date] => 1995-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5928 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/555/05555209.pdf [firstpage_image] =>[orig_patent_app_number] => 510376 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/510376
Circuit for latching data signals from DRAM memory Aug 1, 1995 Issued
Array ( [id] => 3727476 [patent_doc_number] => 05617350 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-01 [patent_title] => 'Flash memory system having reduced disturb and method' [patent_app_type] => 1 [patent_app_number] => 8/509876 [patent_app_country] => US [patent_app_date] => 1995-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 5978 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/617/05617350.pdf [firstpage_image] =>[orig_patent_app_number] => 509876 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/509876
Flash memory system having reduced disturb and method Jul 31, 1995 Issued
Array ( [id] => 3635170 [patent_doc_number] => 05608675 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-04 [patent_title] => 'Current control circuit for sense amplifier' [patent_app_type] => 1 [patent_app_number] => 8/498572 [patent_app_country] => US [patent_app_date] => 1995-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1800 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/608/05608675.pdf [firstpage_image] =>[orig_patent_app_number] => 498572 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/498572
Current control circuit for sense amplifier Jul 5, 1995 Issued
Array ( [id] => 3623234 [patent_doc_number] => 05535155 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-09 [patent_title] => 'SRAM cell having load thin film transistors' [patent_app_type] => 1 [patent_app_number] => 8/498173 [patent_app_country] => US [patent_app_date] => 1995-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 4451 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/535/05535155.pdf [firstpage_image] =>[orig_patent_app_number] => 498173 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/498173
SRAM cell having load thin film transistors Jul 4, 1995 Issued
Array ( [id] => 3633014 [patent_doc_number] => 05612922 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-18 [patent_title] => 'Page mode editable real time read transfer' [patent_app_type] => 1 [patent_app_number] => 8/498178 [patent_app_country] => US [patent_app_date] => 1995-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7566 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/612/05612922.pdf [firstpage_image] =>[orig_patent_app_number] => 498178 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/498178
Page mode editable real time read transfer Jul 4, 1995 Issued
Array ( [id] => 3671407 [patent_doc_number] => 05657266 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-12 [patent_title] => 'Single ended transfer circuit' [patent_app_type] => 1 [patent_app_number] => 8/497071 [patent_app_country] => US [patent_app_date] => 1995-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 7415 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/657/05657266.pdf [firstpage_image] =>[orig_patent_app_number] => 497071 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/497071
Single ended transfer circuit Jun 29, 1995 Issued
Array ( [id] => 3674068 [patent_doc_number] => 05598375 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-28 [patent_title] => 'Static random access memory dynamic address decoder with non-overlap word-line enable' [patent_app_type] => 1 [patent_app_number] => 8/494275 [patent_app_country] => US [patent_app_date] => 1995-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5829 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/598/05598375.pdf [firstpage_image] =>[orig_patent_app_number] => 494275 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/494275
Static random access memory dynamic address decoder with non-overlap word-line enable Jun 22, 1995 Issued
Array ( [id] => 3673917 [patent_doc_number] => 05598365 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-28 [patent_title] => 'High-density read-only memory' [patent_app_type] => 1 [patent_app_number] => 8/493609 [patent_app_country] => US [patent_app_date] => 1995-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2348 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/598/05598365.pdf [firstpage_image] =>[orig_patent_app_number] => 493609 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/493609
High-density read-only memory Jun 21, 1995 Issued
Array ( [id] => 3622620 [patent_doc_number] => 05566116 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-15 [patent_title] => 'Bit line sense amplifier of semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/492578 [patent_app_country] => US [patent_app_date] => 1995-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3951 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/566/05566116.pdf [firstpage_image] =>[orig_patent_app_number] => 492578 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/492578
Bit line sense amplifier of semiconductor memory device Jun 19, 1995 Issued
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