Huan Hoang

Array ( [id] => 3064415 [patent_doc_number] => 05357369 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-10-18 [patent_title] => 'Wide-field three-dimensional viewing system' [patent_app_type] => 1 [patent_app_number] => 7/993416 [patent_app_country] => US [patent_app_date] => 1992-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4431 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/357/05357369.pdf [firstpage_image] =>[orig_patent_app_number] => 993416 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3431607 [patent_doc_number] => 05422759 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-06-06 [patent_title] => 'Downward viewing optical device' [patent_app_type] => 1 [patent_app_number] => 7/992329 [patent_app_country] => US [patent_app_date] => 1992-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1029 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/422/05422759.pdf [firstpage_image] =>[orig_patent_app_number] => 992329 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3076804 [patent_doc_number] => 05311481 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-05-10 [patent_title] => 'Wordline driver circuit having a directly gated pull-down device' [patent_app_type] => 1 [patent_app_number] => 7/993934 [patent_app_country] => US [patent_app_date] => 1992-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 3860 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/311/05311481.pdf [firstpage_image] =>[orig_patent_app_number] => 993934 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3076770 [patent_doc_number] => 05311480 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-05-10 [patent_title] => 'Method and apparatus for EEPROM negative voltage wordline decoding' [patent_app_type] => 1 [patent_app_number] => 7/991231 [patent_app_country] => US [patent_app_date] => 1992-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 5487 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/311/05311480.pdf [firstpage_image] =>[orig_patent_app_number] => 991231 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3459506 [patent_doc_number] => 05424994 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-06-13 [patent_title] => 'Semiconductor memory unit used as external storage' [patent_app_type] => 1 [patent_app_number] => 7/990837 [patent_app_country] => US [patent_app_date] => 1992-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4368 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/424/05424994.pdf [firstpage_image] =>[orig_patent_app_number] => 990837 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3491434 [patent_doc_number] => 05406514 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-04-11 [patent_title] => 'Semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 7/991463 [patent_app_country] => US [patent_app_date] => 1992-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9298 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 328 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/406/05406514.pdf [firstpage_image] =>[orig_patent_app_number] => 991463 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3103682 [patent_doc_number] => 05313430 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-05-17 [patent_title] => 'Power down circuit for testing memory arrays' [patent_app_type] => 1 [patent_app_number] => 7/987923 [patent_app_country] => US [patent_app_date] => 1992-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1362 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/313/05313430.pdf [firstpage_image] =>[orig_patent_app_number] => 987923 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3118449 [patent_doc_number] => 05408436 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-04-18 [patent_title] => 'Circuit structure having distributed registers with self-timed reading and writing operations' [patent_app_type] => 1 [patent_app_number] => 7/979960 [patent_app_country] => US [patent_app_date] => 1992-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3725 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/408/05408436.pdf [firstpage_image] =>[orig_patent_app_number] => 979960 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3018869 [patent_doc_number] => 05355344 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-10-11 [patent_title] => 'Structure for using a portion of an integrated circuit die' [patent_app_type] => 1 [patent_app_number] => 7/975628 [patent_app_country] => US [patent_app_date] => 1992-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 2331 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/355/05355344.pdf [firstpage_image] =>[orig_patent_app_number] => 975628 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3489843 [patent_doc_number] => 05400295 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-03-21 [patent_title] => 'Semiconductor integrated circuit device and semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 7/976055 [patent_app_country] => US [patent_app_date] => 1992-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 3811 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/400/05400295.pdf [firstpage_image] =>[orig_patent_app_number] => 976055 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3082309 [patent_doc_number] => 05337271 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-08-09 [patent_title] => 'Semiconductor storage device capable of reduced current consumption using a charge reuse circuit' [patent_app_type] => 1 [patent_app_number] => 7/974925 [patent_app_country] => US [patent_app_date] => 1992-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 4947 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/337/05337271.pdf [firstpage_image] =>[orig_patent_app_number] => 974925 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3435768 [patent_doc_number] => 05416746 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-05-16 [patent_title] => 'Memory circuit for alternately accessing data within a period of address data' [patent_app_type] => 1 [patent_app_number] => 7/974222 [patent_app_country] => US [patent_app_date] => 1992-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3746 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 329 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/416/05416746.pdf [firstpage_image] =>[orig_patent_app_number] => 974222 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3124879 [patent_doc_number] => 05396463 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-03-07 [patent_title] => 'Data output circuit of a semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 7/973690 [patent_app_country] => US [patent_app_date] => 1992-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2600 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/396/05396463.pdf [firstpage_image] =>[orig_patent_app_number] => 973690 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3044333 [patent_doc_number] => 05329483 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-07-12 [patent_title] => 'MOS semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 7/967709 [patent_app_country] => US [patent_app_date] => 1992-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 22 [patent_no_of_words] => 3874 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 283 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/329/05329483.pdf [firstpage_image] =>[orig_patent_app_number] => 967709 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3103831 [patent_doc_number] => 05369608 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-11-29 [patent_title] => 'Apparatus for relieving standby current fail of memory device' [patent_app_type] => 1 [patent_app_number] => 7/964620 [patent_app_country] => US [patent_app_date] => 1992-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2558 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/369/05369608.pdf [firstpage_image] =>[orig_patent_app_number] => 964620 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3425446 [patent_doc_number] => 05394361 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-02-28 [patent_title] => 'Read/write memory' [patent_app_type] => 1 [patent_app_number] => 7/965138 [patent_app_country] => US [patent_app_date] => 1992-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3404 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/394/05394361.pdf [firstpage_image] =>[orig_patent_app_number] => 965138 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3463021 [patent_doc_number] => 05379254 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-01-03 [patent_title] => 'Asymmetrical alternate metal virtual ground EPROM array' [patent_app_type] => 1 [patent_app_number] => 7/963985 [patent_app_country] => US [patent_app_date] => 1992-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 3084 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 365 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/379/05379254.pdf [firstpage_image] =>[orig_patent_app_number] => 963985 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3001423 [patent_doc_number] => 05347493 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-09-13 [patent_title] => 'Row decoder for NAND-type ROM' [patent_app_type] => 1 [patent_app_number] => 7/938731 [patent_app_country] => US [patent_app_date] => 1992-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2679 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/347/05347493.pdf [firstpage_image] =>[orig_patent_app_number] => 938731 [rel_patent_id] =>[rel_patent_doc_number] =>)