Search

Huan Hoang

Examiner (ID: 8099, Phone: (571)272-1779 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2154, 2827, 2511, 2818
Total Applications
3260
Issued Applications
3044
Pending Applications
110
Abandoned Applications
129

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16528518 [patent_doc_number] => 20200402599 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-24 [patent_title] => Memory Device with a Fuse Protection Circuit [patent_app_type] => utility [patent_app_number] => 17/013967 [patent_app_country] => US [patent_app_date] => 2020-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8131 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17013967 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/013967
Memory device with a fuse protection circuit Sep 7, 2020 Issued
Array ( [id] => 17115338 [patent_doc_number] => 20210295935 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => SEMICONDUCTOR STORAGE DEVICE AND CONTROL METHOD OF SEMICONDUCTOR STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 17/012118 [patent_app_country] => US [patent_app_date] => 2020-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4841 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17012118 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/012118
Semiconductor storage device and control method of semiconductor storage device Sep 3, 2020 Issued
Array ( [id] => 17470332 [patent_doc_number] => 11276815 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-15 [patent_title] => Spin-orbit torque type magnetization reversal element, magnetic memory, and high frequency magnetic device [patent_app_type] => utility [patent_app_number] => 17/010329 [patent_app_country] => US [patent_app_date] => 2020-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 12287 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17010329 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/010329
Spin-orbit torque type magnetization reversal element, magnetic memory, and high frequency magnetic device Sep 1, 2020 Issued
Array ( [id] => 17825552 [patent_doc_number] => 11430504 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-30 [patent_title] => Row clear features for memory devices and associated methods and systems [patent_app_type] => utility [patent_app_number] => 17/005034 [patent_app_country] => US [patent_app_date] => 2020-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 9608 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17005034 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/005034
Row clear features for memory devices and associated methods and systems Aug 26, 2020 Issued
Array ( [id] => 17447855 [patent_doc_number] => 20220068360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-03 [patent_title] => PSEUDO-TRIPLE-PORT SRAM BITCELL ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 17/002082 [patent_app_country] => US [patent_app_date] => 2020-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9804 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17002082 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/002082
Pseudo-triple-port SRAM bitcell architecture Aug 24, 2020 Issued
Array ( [id] => 17115295 [patent_doc_number] => 20210295892 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => SEMICONDUCTOR STORAGE DEVICE AND CONTROL METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/002512 [patent_app_country] => US [patent_app_date] => 2020-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11423 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17002512 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/002512
Semiconductor storage device and control method thereof Aug 24, 2020 Issued
Array ( [id] => 17431429 [patent_doc_number] => 20220059138 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-24 [patent_title] => LOW-GLITCH SWITCH CONTROL FOR MODE SWITCHING OF MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 17/000163 [patent_app_country] => US [patent_app_date] => 2020-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6659 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -35 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17000163 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/000163
Low-glitch switch control for mode switching of memory cells Aug 20, 2020 Issued
Array ( [id] => 16509052 [patent_doc_number] => 20200388308 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-10 [patent_title] => LEAKAGE PATHWAY PREVENTION IN A MEMORY STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 16/999867 [patent_app_country] => US [patent_app_date] => 2020-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9083 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16999867 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/999867
Leakage pathway prevention in a memory storage device Aug 20, 2020 Issued
Array ( [id] => 16677010 [patent_doc_number] => 20210065776 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => MEMORY COMPUTING, HIGH-DENSITY ARRAY [patent_app_type] => utility [patent_app_number] => 16/994488 [patent_app_country] => US [patent_app_date] => 2020-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9851 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16994488 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/994488
High-density array, in memory computing Aug 13, 2020 Issued
Array ( [id] => 16928059 [patent_doc_number] => 11049548 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-06-29 [patent_title] => Multi-bank type semiconductor memory device with reduced current consumption in data lines [patent_app_type] => utility [patent_app_number] => 16/991603 [patent_app_country] => US [patent_app_date] => 2020-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4760 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 498 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16991603 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/991603
Multi-bank type semiconductor memory device with reduced current consumption in data lines Aug 11, 2020 Issued
Array ( [id] => 16631390 [patent_doc_number] => 20210050043 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-18 [patent_title] => MEMORY DEVICE COMPRISING PROGRAMMABLE COMMAND-AND-ADDRESS AND/OR DATA INTERFACES [patent_app_type] => utility [patent_app_number] => 16/987157 [patent_app_country] => US [patent_app_date] => 2020-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6378 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16987157 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/987157
Memory device comprising programmable command-and-address and/or data interfaces Aug 5, 2020 Issued
Array ( [id] => 17402640 [patent_doc_number] => 20220044731 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-10 [patent_title] => ACCELERATION OF DATA QUERIES IN MEMORY [patent_app_type] => utility [patent_app_number] => 16/984452 [patent_app_country] => US [patent_app_date] => 2020-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7917 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16984452 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/984452
Acceleration of data queries in memory Aug 3, 2020 Issued
Array ( [id] => 16943949 [patent_doc_number] => 11056197 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-06 [patent_title] => Charge pump and memory device including the same [patent_app_type] => utility [patent_app_number] => 16/947413 [patent_app_country] => US [patent_app_date] => 2020-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 11396 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 333 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16947413 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/947413
Charge pump and memory device including the same Jul 30, 2020 Issued
Array ( [id] => 17516643 [patent_doc_number] => 11295803 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-05 [patent_title] => Memory with dynamic voltage scaling [patent_app_type] => utility [patent_app_number] => 16/945303 [patent_app_country] => US [patent_app_date] => 2020-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7945 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16945303 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/945303
Memory with dynamic voltage scaling Jul 30, 2020 Issued
Array ( [id] => 17389087 [patent_doc_number] => 20220036939 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-03 [patent_title] => APPARATUSES, SYSTEMS, AND METHODS FOR SYSTEM ON CHIP REPLACEMENT MODE [patent_app_type] => utility [patent_app_number] => 16/942503 [patent_app_country] => US [patent_app_date] => 2020-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7484 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16942503 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/942503
Apparatuses, systems, and methods for system on chip replacement mode Jul 28, 2020 Issued
Array ( [id] => 17047774 [patent_doc_number] => 11100963 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-08-24 [patent_title] => Data first-in first-out (FIFO) circuit [patent_app_type] => utility [patent_app_number] => 16/935206 [patent_app_country] => US [patent_app_date] => 2020-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6549 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16935206 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/935206
Data first-in first-out (FIFO) circuit Jul 21, 2020 Issued
Array ( [id] => 16936093 [patent_doc_number] => 20210201982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => MEMORY DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/935712 [patent_app_country] => US [patent_app_date] => 2020-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16236 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16935712 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/935712
Memory device and operating method thereof Jul 21, 2020 Issued
Array ( [id] => 17373381 [patent_doc_number] => 20220028433 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-27 [patent_title] => BIASING ELECTRONIC COMPONENTS USING ADJUSTABLE CIRCUITRY [patent_app_type] => utility [patent_app_number] => 16/934213 [patent_app_country] => US [patent_app_date] => 2020-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6073 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16934213 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/934213
Biasing electronic components using adjustable circuitry Jul 20, 2020 Issued
Array ( [id] => 17107240 [patent_doc_number] => 11127465 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-21 [patent_title] => Non-volatile memory device and programming method thereof [patent_app_type] => utility [patent_app_number] => 16/934150 [patent_app_country] => US [patent_app_date] => 2020-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 10598 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16934150 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/934150
Non-volatile memory device and programming method thereof Jul 20, 2020 Issued
Array ( [id] => 16934799 [patent_doc_number] => 20210200688 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => APPARATUS AND METHOD FOR IMPROVING INPUT AND OUTPUT THROUGHPUT OF MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 16/921508 [patent_app_country] => US [patent_app_date] => 2020-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17010 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16921508 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/921508
Apparatus and method for improving input and output throughput of memory system Jul 5, 2020 Issued
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