Search

Huan Hoang

Examiner (ID: 18810, Phone: (571)272-1779 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2818, 2154, 2827, 2511
Total Applications
3293
Issued Applications
3069
Pending Applications
116
Abandoned Applications
129

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16668689 [patent_doc_number] => 10937948 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-02 [patent_title] => Magnetic memory using spin-orbit torque [patent_app_type] => utility [patent_app_number] => 16/806533 [patent_app_country] => US [patent_app_date] => 2020-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 15 [patent_no_of_words] => 7513 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16806533 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/806533
Magnetic memory using spin-orbit torque Mar 1, 2020 Issued
Array ( [id] => 17410016 [patent_doc_number] => 11250912 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-15 [patent_title] => Semiconductor storage device [patent_app_type] => utility [patent_app_number] => 16/805369 [patent_app_country] => US [patent_app_date] => 2020-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 24 [patent_no_of_words] => 7950 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16805369 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/805369
Semiconductor storage device Feb 27, 2020 Issued
Array ( [id] => 16285995 [patent_doc_number] => 20200279597 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-03 [patent_title] => COMPUTATIONAL RANDOM ACCESS MEMORY (CRAM) BASED ON SPIN-ORBIT TORQUE DEVICES [patent_app_type] => utility [patent_app_number] => 16/803454 [patent_app_country] => US [patent_app_date] => 2020-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10770 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16803454 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/803454
Computational random access memory (CRAM) based on spin-orbit torque devices Feb 26, 2020 Issued
Array ( [id] => 16788979 [patent_doc_number] => 10991416 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-04-27 [patent_title] => Capacitance-based compensation circuitry [patent_app_type] => utility [patent_app_number] => 16/803486 [patent_app_country] => US [patent_app_date] => 2020-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8187 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16803486 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/803486
Capacitance-based compensation circuitry Feb 26, 2020 Issued
Array ( [id] => 16372181 [patent_doc_number] => 10803947 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-13 [patent_title] => Three-dimensional nonvolatile memory and related read method designed to reduce read disturbance [patent_app_type] => utility [patent_app_number] => 16/801214 [patent_app_country] => US [patent_app_date] => 2020-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 10401 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 420 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16801214 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/801214
Three-dimensional nonvolatile memory and related read method designed to reduce read disturbance Feb 25, 2020 Issued
Array ( [id] => 16943960 [patent_doc_number] => 11056208 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-07-06 [patent_title] => Data dependent sense amplifier with symmetric margining [patent_app_type] => utility [patent_app_number] => 16/801728 [patent_app_country] => US [patent_app_date] => 2020-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4549 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16801728 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/801728
Data dependent sense amplifier with symmetric margining Feb 25, 2020 Issued
Array ( [id] => 17551338 [patent_doc_number] => 20220122680 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-21 [patent_title] => ANTI-FUSE MEMORY CELL CIRCUIT, ARRAY CIRCUIT AND READING AND WRITING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/432808 [patent_app_country] => US [patent_app_date] => 2020-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5144 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17432808 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/432808
Anti-fuse memory cell circuit, array circuit and reading and writing method thereof Feb 21, 2020 Issued
Array ( [id] => 16637769 [patent_doc_number] => 10916283 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-09 [patent_title] => Magnetic domain wall movement element and magnetic recording array [patent_app_type] => utility [patent_app_number] => 16/795876 [patent_app_country] => US [patent_app_date] => 2020-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 13243 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16795876 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/795876
Magnetic domain wall movement element and magnetic recording array Feb 19, 2020 Issued
Array ( [id] => 16272517 [patent_doc_number] => 20200274005 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-27 [patent_title] => Dual-Use Semiconductor Device for Solar Power and Data Storage [patent_app_type] => utility [patent_app_number] => 16/796680 [patent_app_country] => US [patent_app_date] => 2020-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8174 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16796680 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/796680
Dual-use semiconductor device for solar power and data storage Feb 19, 2020 Issued
Array ( [id] => 16738741 [patent_doc_number] => 10964402 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-03-30 [patent_title] => Reprogramming memory cells to tighten threshold voltage distributions and improve data retention [patent_app_type] => utility [patent_app_number] => 16/794614 [patent_app_country] => US [patent_app_date] => 2020-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 39 [patent_no_of_words] => 21385 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16794614 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/794614
Reprogramming memory cells to tighten threshold voltage distributions and improve data retention Feb 18, 2020 Issued
Array ( [id] => 16896086 [patent_doc_number] => 11037647 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-06-15 [patent_title] => Systems and methods for updating memory circuitry [patent_app_type] => utility [patent_app_number] => 16/795090 [patent_app_country] => US [patent_app_date] => 2020-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6036 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16795090 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/795090
Systems and methods for updating memory circuitry Feb 18, 2020 Issued
Array ( [id] => 17062917 [patent_doc_number] => 11107526 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-08-31 [patent_title] => Controlling forming process in RRAM devices using feedback circuits [patent_app_type] => utility [patent_app_number] => 16/795482 [patent_app_country] => US [patent_app_date] => 2020-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3382 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16795482 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/795482
Controlling forming process in RRAM devices using feedback circuits Feb 18, 2020 Issued
Array ( [id] => 17137438 [patent_doc_number] => 11139002 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-05 [patent_title] => Interconnection for memory electrodes [patent_app_type] => utility [patent_app_number] => 16/790477 [patent_app_country] => US [patent_app_date] => 2020-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 12668 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16790477 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/790477
Interconnection for memory electrodes Feb 12, 2020 Issued
Array ( [id] => 18827491 [patent_doc_number] => 11842780 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-12 [patent_title] => Semiconductor device and electronic apparatus including the same [patent_app_type] => utility [patent_app_number] => 17/439454 [patent_app_country] => US [patent_app_date] => 2020-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 20301 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17439454 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/439454
Semiconductor device and electronic apparatus including the same Jan 30, 2020 Issued
Array ( [id] => 17523254 [patent_doc_number] => 20220109103 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-07 [patent_title] => MAGNETIC MEMORY DEVICE USING DOPED SEMICONDUCTOR LAYER [patent_app_type] => utility [patent_app_number] => 17/426508 [patent_app_country] => US [patent_app_date] => 2020-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2122 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17426508 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/426508
Magnetic memory device using doped semiconductor layer Jan 30, 2020 Issued
Array ( [id] => 16521422 [patent_doc_number] => 10872645 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-12-22 [patent_title] => Semiconductor devices [patent_app_type] => utility [patent_app_number] => 16/731848 [patent_app_country] => US [patent_app_date] => 2019-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6779 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16731848 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/731848
Semiconductor devices Dec 30, 2019 Issued
Array ( [id] => 16544689 [patent_doc_number] => 20200411104 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-31 [patent_title] => NONVOLATILE MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THEREOF [patent_app_type] => utility [patent_app_number] => 16/731288 [patent_app_country] => US [patent_app_date] => 2019-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11321 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16731288 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/731288
Nonvolatile memory device and memory system including thereof Dec 30, 2019 Issued
Array ( [id] => 16936097 [patent_doc_number] => 20210201986 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => MEMORY CONTEXT RESTORE, REDUCTION OF BOOT TIME OF A SYSTEM ON A CHIP BY REDUCING DOUBLE DATA RATE MEMORY TRAINING [patent_app_type] => utility [patent_app_number] => 16/730086 [patent_app_country] => US [patent_app_date] => 2019-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8271 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16730086 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/730086
Memory context restore, reduction of boot time of a system on a chip by reducing double data rate memory training Dec 29, 2019 Issued
Array ( [id] => 16534942 [patent_doc_number] => 10877541 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-12-29 [patent_title] => Power delivery timing for memory [patent_app_type] => utility [patent_app_number] => 16/729808 [patent_app_country] => US [patent_app_date] => 2019-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6967 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16729808 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/729808
Power delivery timing for memory Dec 29, 2019 Issued
Array ( [id] => 16509055 [patent_doc_number] => 20200388311 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-10 [patent_title] => ENABLE SIGNAL GENERATION CIRCUIT AND SEMICONDUCTOR APPARATUS USING THE SAME [patent_app_type] => utility [patent_app_number] => 16/730206 [patent_app_country] => US [patent_app_date] => 2019-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8935 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16730206 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/730206
Enable signal generation circuit and semiconductor apparatus using the same Dec 29, 2019 Issued
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